參數(shù)資料
型號: MB91FV130CR-ES
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 32-Bit RISC Microcontroller
中文描述: 32-BIT, 33 MHz, RISC MICROCONTROLLER, CPGA299
封裝: CERAMIC, PGA-299
文件頁數(shù): 45/123頁
文件大小: 1362K
代理商: MB91FV130CR-ES
MB91133/MB91F133
45
Port Data Register (PDR)
PDR2 to L are input/output data registers of the I/O port.
Input/output control is carried out by DDR2 to L that are handled.
PDR2
Initial value
XXXXXXXX
B
Access
R/W
Address : 000001
H
PDR3
Initial value
XXXXXXXX
B
Access
R/W
Address : 000000
H
PDR4
Initial value
XXXXXXXX
B
Access
R/W
Address : 000007
H
PDR5
Initial value
XXXXXXXX
B
Access
R/W
Address : 000006
H
PDR6
Initial value
XXXXXXXX
B
Access
R/W
Address : 000005
H
PDR8
Initial value
- XXXXXXX
B
Access
R/W
Address : 00000B
H
PDRC
Initial value
XXXXXXXX
B
Access
R/W
Address : 000013
H
PDRD
Initial value
XXXXXXXX
B
Access
R/W
Address : 000012
H
PDRE
Initial value
XXXXXXXX
B
Access
R/W
Address : 000011
H
PDRF
Initial value
XXXXXXXX
B
Access
R/W
Address : 000010
H
PDRG
Initial value
- - XXXXXX
B
Access
R/W
Address : 000017
H
PDRH
Initial value
- - - - - XXX
B
Access
R/W
Address : 000016
H
PDRI
Initial value
- - XXXXXX
B
Access
R/W
Address : 000015
H
PDRJ
Initial value
- - XXXXXX
B
Access
R/W
Address : 000014
H
PDRK
Initial value
XXXXXXXX
B
Access
R/W
Address : 00001B
H
PDRL
Initial value
XXXXXXXX
B
Access
R/W
Address : 00001A
H
7
6
5
4
3
2
1
0
P26
P27
P25
P24
P23
P22
P21
P20
7
6
5
4
3
2
1
0
P36
P37
P35
P34
P33
P32
P31
P30
7
6
5
4
3
2
1
0
P46
P47
P45
P44
P43
P42
P41
P40
7
6
5
4
3
2
1
0
P56
P57
P55
P54
P53
P52
P51
P50
7
6
5
4
3
2
1
0
P66
P67
P65
P64
P63
P62
P61
P60
7
6
5
4
3
2
1
0
P86
P85
P84
P83
P82
P81
P80
7
6
5
4
3
2
1
0
PC6
PC7
PC5
PC4
PC3
PC2
PC1
PC0
7
6
5
4
3
2
1
0
PD6
PD7
PD5
PD4
PD3
PD2
PD1
PD0
7
6
5
4
3
2
1
0
PE6
PE7
PE5
PE4
PE3
PE2
PE1
PE0
7
6
5
4
3
2
1
0
PF6
PF7
PF5
PF4
PF3
PF2
PF1
PF0
7
6
5
4
3
2
1
0
PG5
PG4
PG3
PG2
PG1
PG0
7
6
5
4
3
2
1
0
PH2
PH1
PH0
7
6
5
4
3
2
1
0
PI5
PI4
PI3
PI2
PI1
PI0
7
6
5
4
3
2
1
0
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
7
6
5
4
3
2
1
0
PK6
PK7
PK5
PK4
PK3
PK2
PK1
PK0
7
6
5
4
3
2
1
0
PL6
PL7
PL5
PL4
PL3
PL2
PL1
PL0
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