參數(shù)資料
型號: MB91F464AAPMC-GSE2
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-100
文件頁數(shù): 26/95頁
文件大?。?/td> 2538K
代理商: MB91F464AAPMC-GSE2
MB91460A Series
32
4.2.
Pin connections in parallel programming mode
Resetting after setting the MD[2:0] pins to [111] will halt CPU functioning. At this time, the Flash memory’s
interface circuit enables direct control of the Flash memory unit from external pins by directly linking some of
the signals to General Purpose Ports. Please see table below for signal mapping.
In this mode, the Flash memory appears to the external pins as a stand-alone unit. This mode is generally set
when writing/erasing using the parallel Flash programmer. In this mode, all operations of the 8.5 Mbits Flash
memory’s Auto Algorithms are available.
Correspondence between MBM29LV400TC and Flash Memory Control Signals
MBM29LV400TC
External pins
FR-CPU mode
MB91F464Ax external pins
Comment
Flash memory
mode
Normal function
Pin number
INITX
INITX
52
RESET
FRSTX
P16_7
53
MD_2
99
Set to ‘1’
MD_1
98
Set to ‘1’
MD_0
92
Set to ‘1’
RY/BY
FMCS:RDY bit
RY/BYX
P24_0
74
BYTE
Internally xed to ’H’
BYTEX
P24_2
78
WE
Internal control signal
+ control via interface
circuit
WEX
P28_3
29
OE
OEX
P28_2
28
CE
CEX
P28_1
27
ATDIN
P22_1
73
Set to ‘0’
EQIN
P22_0
72
Set to ‘0’
TESTX
P24_3
79
Set to ‘1’
RDYI
P24_1
77
Set to ‘0’
A-1
Internal address bus
FA0
P19_2
47
Set to ‘0’
A0 to A7
FA1 to FA8
P27_0 to P27_7
16 to 23
A8 to A15
FA9 to FA16
P15_0 to P15_5,
P21_0, P21_1
68 to 71, 10,
11, 57, 58
A16 to A18
FA17 to FA19
P21_2, P21_4,
P21_5
59, 60, 61
FA20,FA21
P21_6, P28_0
62, 24
Set to ‘1’
DQ0 to DQ7
Internal data bus
DQ0 to DQ7
P17_0 to P17_7
48, 49, 54,
55, 56, 65,
66, 67
DQ8 to DQ15
P14_0 to P14_7
2 to 9
PRELIMINARY
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