參數(shù)資料
型號： MB91637APMC
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, MROM, 40 MHz, RISC MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù)： 115/136頁
文件大?。?/td> 4123K
代理商： MB91637APMC
MB91635A Series
8
DS07-16909-2E
■ PIN DESCRIPTION
The number after the underscore (“_”) in pin names such as XXX_1 and XXX_2 indicates the port number.
For these pins, there are multiple pins that provide the same function for the same channel. Use the extended
port function register (EPFR) to select the pin.
(Continued)
Pin no.
Pin name
I/O
circuit
type*3
Function
CMOS
level
input
CMOSlevel
hysteresis
input
LQFP-
144*1
PFBGA-
144*2
1B1
VSS
GND pin
2B2
C
Power stabilization capacity pin
3C1
PH7
D*4
General-purpose I/O port
TIOB7_1
Base timer ch.7 TIOB pin (Port 1)
INT7_1
External interrupt request 7 input pin
(Port 1)
4C2
PG0
D*4
General-purpose I/O port
DREQ2
DMA controller (DMAC) ch.2 trans-
fer request input pin
TIOA0_1
Base timer ch.0 TIOA pin (Port 1)
SOUT0_2
Multifunction serial interface ch.0
output pin (Port 2).
This pin operates as SOUT0_2
when it is used in a UART/CSIO (op-
eration modes 0 to 2).
IN0_2
32-bit input capture ch.0 input pin
(Port 2)
5C3
PG1
D*4
General-purpose I/O port
DACK2
DMA controller (DMAC) ch.2 trans-
fer request acceptance signal output
pin
TIOB0_1
Base timer ch.0 TIOB pin (Port 1)
SIN0_2
Multifunction serial interface ch.0 in-
put pin (Port 2)
IN1_2
32-bit input capture ch.1 input pin
(Port 2)
6D2
PG2
D*4
General-purpose I/O port
DEOP2
DMA controller (DMAC) ch.2 last
transfer signal output pin
TIOA1_1
Base timer ch.1 TIOA pin (Port 1)
SCK0_2
Multifunction serial interface ch.0
clock I/O pin (Port 2).
This pin operates as SCK0_2 when
it is used in a UART/CSIO (operation
modes 0 to 2).
IN2_2
32-bit input capture ch.2 input pin
(Port 2)
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