參數(shù)資料
型號: MB91482PMC-GE1
元件分類: 微控制器/微處理器
英文描述: 32-BIT, MROM, 80 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù): 26/92頁
文件大小: 2431K
代理商: MB91482PMC-GE1
MB91470/480 Series
32
DS07-16901-5E
■ MODE SETTINGS
The FR family uses mode pins (MD2 to MD0) and mode data to set the operation mode.
1.
Mode Pins
The MD2 to MD0 pins specify how the mode vector fetch and reset vector fetch is performed.
Settings other than those shown in the following table are prohibited.
2.
Mode data
The data that is written to the internal mode register (MODR) by the mode vector fetch is called mode data.
After the mode register is set, the device runs in the operating mode specified by this register.
The mode data is set by all of the reset sources. User programs cannot set the mode register.
<Details of mode data description>
[bit 23 to bit 19] Reserved bits
Be sure to set these bits to “00000B”.
Operation is not guaranteed if these bits are set to a value other than “00000B”.
[bit 18] ROMA (Internal Flash/ROM enable bit)
This bit configures whether the internal Flash/ROM area (8 0000H to F FFFFH) is enabled.
Mode Pins
Mode name
Reset vector
access area
Remarks
MD2
MD1
MD0
0
Internal ROM mode vector
Internal
0
1
External ROM mode vector
External
The bus width is set
by mode register.
ROMA
Function
Remarks
0
External ROM mode
Internal Flash/ROM area (8 0000H to F FFFFH) is used as an external area.
1
Internal ROM mode
Internal Flash/ROM area (8 0000H to F FFFFH) is enabled.
bit23
bit22
bit21
bit20
bit19
bit18
bit17
bit16
0
ROMA
WTH1
WTH0
Operation mode setting bits
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