參數(shù)資料
型號： MB90W224AZF
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 16-BIT, UVPROM, 16 MHz, MICROCONTROLLER, CQFP120
封裝： CERAMIC, QFP-120
文件頁數(shù)： 99/105頁
文件大小： 1800K
代理商： MB90W224AZF
93
MB90220 Series
Table 13
Signed Multiplication and Division Instructions (Word/Long Word) [11 Insturctions]
For an explanation of “(b)” and “(c)”, refer to Table 5, “Correction Values for Number of Cycles Used to Calculate
Number of Actual Cycles.”
*1: 3 when dividing into zero, 8 or 18 when an overflow occurs, and 18 normally.
*2: 3 when dividing into zero, 10 or 21 when an overflow occurs, and 22 normally.
*3: 4 + (a) when dividing into zero, 11 + (a) or 22 + (a) when an overflow occurs, and 23 + (a) normally.
*4: When the dividend is positive: 4 when dividing into zero, 10 or 29 when an overflow occurs, and 30 normally.
When the dividend is negative: 4 when dividing into zero, 11 or 30 when an overflow occurs, and 31 normally.
*5: When the dividend is positive: 4 + (a) when dividing into zero, 11 + (a) or 30 + (a) when an overflow occurs,
and 31 + (a) normally.
When the dividend is negative: 4 + (a) when dividing into zero, 12 + (a) or 31 + (a) when an overflow occurs,
and 32 + (a) normally.
*6: (b) when dividing into zero or when an overflow occurs, and 2
× (b) normally.
*7: (c) when dividing into zero or when an overflow occurs, and 2
× (c) normally.
*8: 3 when byte (AH) is zero, 12 when the result is positive, and 13 when the result is negative.
*9: 3 when byte (ear) is zero, 12 when the result is positive, and 13 when the result is negative.
*10: 4 + (a) when byte (eam) is zero, 13 + (a) when the result is positive, and 14 + (a) when the result is negative.
*11: 3 when word (AH) is zero, 12 when the result is positive, and 13 when the result is negative.
*12: 3 when word (ear) is zero, 16 when the result is positive, and 19 when the result is negative.
*13: 4 + (a) when word (eam) is zero, 17 + (a) when the result is positive, and 20 + (a) when the result is negative.
Note: Which of the two values given for the number of execution cycles applies when an overflow error occurs in
a DIV or DIVW instruction depends on whether the overflow was detected before or after the operation.
Mnemonic
#
cycles
B
Operation
LH AH
IS
T
N
Z
V
C RMW
DIV
A
DIV
A, ear
DIV
A, eam
DIVW A, ear
DIVW A, eam
2
2+
2
2+
*1
*2
*3
*4
*5
0
*6
0
*7
word (AH) /byte (AL)
Quotient
→ byte (AL) Remainder → byte (AH)
word (A)/byte (ear)
Quotient
→ byte (A) Remainder → byte (ear)
word (A)/byte (eam)
Quotient
→ byte (A) Remainder → byte (eam)
long (A)/word (ear)
Quotient
→ word (A) Remainder → word (ear)
long (A)/word (eam)
Quotient
→ word (A) Remainder → word (eam)
Z
–
*
–
MUL A
MUL A, ear
MUL A, eam
MULW A
MULW A, ear
MULW A, eam
2
2+
2
2+
*8
*9
*10
*11
*12
*13
0
(b)
0
(b)
byte (AH)
× byte (AL) → word (A)
byte (A)
× byte (ear) → word (A)
byte (A)
× byte (eam) → word (A)
word (AH)
× word (AL) → long (A)
word (A)
× word (ear) → long (A)
word (A)
× word (eam) → long (A)
–
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