
MB90220 Series
32
(Continued)
Initial value
0:
The initial value of this bit is “0”.
1:
The initial value of this bit is “1”.
X: The initial value of this bit is undefined.
–:
This bit is not used. The initial value is undefined.
*:
The initial value of this bit varies with the reset source.
#:
The initial value of this bit varies with the operation mode.
*1: Access prohibited
*2: Only this area is open to external access in the area below address 0000FFH (inclusive). All addresses which
are not described in the table are reserved areas, and accesses to these areas are handled in the same
manner as for internal areas. The access signal for the external bus is not generated.
*3: When an external bus is enable mode, never access to resisters which are not used as general ports in areas
address 000000H to 000005H or 000010H to 000015H.
Address
Register
name
Access
Resouce
name
Initial value
001F48H
PPG cycle setting register 0
PCSR0
W
16-bit PPG
timer 0
X XXXXXXX
001F49H
X XXXXXXX
001F4AH
PPG duty setting register 0
PDUT0
W
X XXXXXXX
001F4BH
X XXXXXXX
001F4CH
PPG cycle setting register 1
PCSR1
W
16-bit PPG
timer 1
X XXXXXXX
001F4DH
X XXXXXXX
001F4EH
PPG duty setting register 1
PDUT1
W
X XXXXXXX
001F4FH
X XXXXXXX
001F50H
ICU lower-order data register 0
ICRL0
R
Input capture 0
X XXXXXXX
001F51H
X XXXXXXX
001F52H
ICU higher-order data register 0
ICRH0
R
X XXXXXXX
001F53H
0 0000000
001F54H
ICU lower-order data register 1
ICRL1
R
Input capture 1
X XXXXXXX
001F55H
X XXXXXXX
001F56H
ICU higher-order data register 1
ICRH1
R
X XXXXXXX
001F57H
0 0000000
001F58H
ICU lower-order data register 2
ICRL2
R
Input capture 2
X XXXXXXX
001F59H
X XXXXXXX
001F5AH
ICU higher-order data register 2
ICRH2
R
X XXXXXXX
001F5BH
0 0000000
001F5CH
ICU lower-order data register 3
ICRL3
R
Input capture 3
X XXXXXXX
001F5DH
X XXXXXXX
001F5EH
ICU higher-order data register 3
ICRH3
R
X XXXXXXX
001F5FH
0 0000000
001F60H
to 1FFFH
(Reserved area)*1