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參數(shù)資料
| 型號(hào)： | MB90F803PF-G |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 20 X 14 MM, 3.35 MM HEIGHT, 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件頁(yè)數(shù)： | 50/92頁(yè) |
| 文件大?。?/td> | 2178K |
| 代理商： | MB90F803PF-G |
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MB90800 Series
54
DS07-13733-6E
13. Time-base timer
The time-base timer has a function that enables a selection of four interval times using 18-bit free-run counter
(time-base counter) with synchronizing to the internal count clock (two division of original oscillation). Further-
more, the function of timer output of oscillation stabilization wait or function supplying operation clocks for
watchdog timer are provided.
(1) Register list
(2) Block diagram
Time-base timer control register (TBTC)
- : Unused
bit
Initial Value
0000A9H
1 - - 00100B
Read/Write
R/W
W
R/W
15
14
13
12
11
10
9
8
R/W
TBIE
TBOF
TBR
TBC1
TBC0
Reserved
TBIE TBOF TBR
Reserved
TBC1 TBC0
OF
× 21 × 22
× 28 × 29 × 210 × 211 × 212 × 213 × 214 × 215 × 216 × 217 × 218
To PPG timer
Time-base timer counter
Dividing HCLK by 2
To watchdog timer
Power-on reset
Counter
clear
control
circuit
Interval timer selector
TBOF clear
Time-base timer control register (TBTC)
Time-base timer interrupt signal
To clock controller
Oscillation stabilizing
Wait time selector
TBOF set
: Unused
OF
: Overflow
HCLK : Oscillation clock
*1
: The machine clock is switched from main/sub clock to PLL clock.
*2
: The machine clock is switched from sub clock to main clock.
Stop mode start
Hold status start
CKSCR : MCS
= 1→0*1
CKSCR : SCS
= 0→1*2
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