參數(shù)資料
型號(hào): MB90F803PF-G
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP100
封裝: 20 X 14 MM, 3.35 MM HEIGHT, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù): 49/92頁
文件大?。?/td> 2178K
代理商: MB90F803PF-G
MB90800 Series
DS07-13733-6E
53
12. Watchdog timer
The watchdog timer is a timer counter provided for preventing program malfunction. The watchdog timer is a 2-
bit counter operating with an output of the timebase timer or watch timer as count clock and resets the CPU
when the counter is not cleared within the interval time.
(1) Register list
(2) Block diagram
Watchdog timer control register (WDTC)
: Unused
bit
Initial Value
0000A8H
XXXXX111B
Read/Write
RR
R
W
76
5
4
3
2
1
0
R
PONR
WRST
ERST
SRST
WTE
WT1
WT0
PONR
WRST ERST SRST WTE
WT1
WT0
× 21 × 22
× 28 × 29 × 210 × 211 × 212 × 213 × 214 × 215 × 216 × 217 × 218
× 21
SCLK
CLR
× 22
× 28 × 29 × 210 × 211 × 212 × 213 × 214 × 215 × 216 × 217 × 218
2
4
Watchdog timer control register (WDTC)
Watchdog timer
Watch mode start
Time-base timer mode start
Sleep mode start
Hold status start
Counter
clear control
circuit
Count
clock
selector
2-bit
counter
Watchdog reset
generation
circuit
Clear
Internal
reset
generation
circuit
CLR and start-up
Time base counter
Dividing HCLK by 2
HCLK: Oscillation clock
SCLK: Sub clock
WDCS bit of watch timer
control register (WTC)
SCM bit of clock selection
register (CKSCR)
Stop mode start
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