參數(shù)資料
型號(hào)： MB90F548GPFF
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100
封裝： PLASTIC, LQFP-100
文件頁數(shù)： 59/60頁
文件大?。?/td> 744K
代理商： MB90F548GPFF
MB90540/540G/545/545G Series
8
s
s PIN DESCRIPTION
(Continued)
Pin No.
Pin name
Circuit type
Function
LQFP*2
QFP*1
80
81
82
83
X0
X1
A
(Oscillation)
High speed oscillator input pins
78
80
X0A
A
(Oscillation)
Low speed oscillator input pins. For the one clock system
parts, perfom external pull-down processing.
77
79
X1A
Low speed oscillator input pins. For the one clock system
parts, leave it open.
75
77
RST
B
External reset request input
50
52
HST
C
Hardware standby input
83 to 90
85 to 92
P00 to P07
I
General I/O port with programmable pullup. This function is
enabled in the single-chip mode.
AD00 to AD07
I/O pins for 8 lower bits of the external address/data bus. This
function is enabled when the external bus is enabled.
91 to 98 93 to 100
P10 to P17
I
General I/O port with programmable pullup. This function is
enabled in the single-chip mode.
AD08 to AD15
I/O pins for 8 higher bits of the external address/data bus. This
function is enabled when the external bus is enabled.
99 to 6
1 to 8
P20 to P27
I
General I/O port with programmable pullup. This function is
enabled in the single-chip mode.
A16 to A23
8-bit I/O pins for A16 to A23 at the external address bus. This
function is enabled when the external bus is enabled.
79
P30
I
General I/O port with programmable pullup. This function is
enabled in the single-chip mode.
ALE
Address latch enable output pin. This function is enabled
when the external bus is enabled.
810
P31
I
General I/O port with programmable pullup. This function is
enabled in the single-chip mode.
RD
Read strobe output pin for the data bus. This function is en-
abled when the external bus is enabled.
10
12
P32
I
General I/O port with programmable pullup. This function is
enabled in the single-chip mode or when the WR/WRL pin out-
put is disabled.
WRL
Write strobe output pin for the data bus. This function is en-
abled when both the external bus and the WR/WRL pin output
are enabled. WRL is write-strobe output pin for the lower 8 bits
of the data bus in 16-bit access. WR is write-strobe output pin
for the 8 bits of the data bus in 8-bit access.
WR
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