參數(shù)資料
型號(hào)： MB90F548GPFF
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100
封裝： PLASTIC, LQFP-100
文件頁數(shù)： 2/60頁
文件大?。?/td> 744K
代理商： MB90F548GPFF
MB90540/540G/545/545G Series
10
(Continued)
Pin No.
Pin name
Circuit
type
Function
LQFP*2
QFP*1
20
22
P44
G
General I/O port. This function is enabled when UART1
disables the clock output.
SCK1
Clock pulse input/output pin for UART1. This function is
enabled when UART1 enables the clock output.
22
24
P45
G
General I/O port. This function is enabled when UART1
disables the serial data output.
SOT1
Serial data output pin for UART1. This function is enabled
when UART1 enables the serial data output.
23
25
P46
G
General I/O port. This function is enabled when the Serial IO
disables the serial data output.
SOT2
Serial data output pin for the Serial IO. This function is enabled
when the Serial IO enables the serial data output.
24
26
P47
G
General I/O port. This function is enabled when the Serial IO
disables the clock output.
SCK2
Clock pulse input/output pin for the Serial IO. This function is
enabled when the Serial IO enables the clock output.
26
28
P50
D
General I/O port. This function is always enabled.
SIN2
Serial data input pin for the Serial IO. Set the corresponding
Port Direction Register to input if this function is used.
27 to 30
29 to 32
P51 to P54
D
General I/O port. This function is always enabled.
INT4 to INT7
External interrupt request input pins for INT4 to INT7. Set the
corresponding Port Direction Register to input if this function is
used.
31
33
P55
D
General I/O port. This function is always enabled.
ADTG
Trigger input pin for the A/D converter. Set the corresponding
Port Direction Register to input if this function is used.
36 to 39
38 to 41
P60 to P63
E
General I/O port. This function is enabled when the analog
input enable register specifies a port.
AN0 to AN3
Analog input pins for the 8/10-bit A/D converter. This function
is enabled when the analog input enable register specifies AD.
41 to 44
43 to 46
P64 to P67
E
General I/O port. The function is enabled when the analog
input enable register specifies a port.
AN4 to AN7
Analog input pins for the 8/10-bit A/D converter. This function
is enabled when the analog input enable register specifies AD.
45
47
P56
D
General I/O port. This function is always enabled.
TIN0
Event input pin for the 16-bit reload timers 0. Set the
corresponding Port Direction Register to input if this function is
used.
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