參數(shù)資料
型號(hào)： MB90F372PMT-G
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP144
封裝： 0.40 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù)： 82/153頁
文件大?。?/td> 2503K
代理商： MB90F372PMT-G
MB90370 Series
34
■ PERIPHERAL RESOURCES
1.
Low-power Consumption Control Circuit
The MB90370 series has the following CPU operating mode selected by the configuration of an operating clock
and clock operation control.
● Clock Mode
PLL clock mode
In this mode, a PLL clock that is a multiple of the oscillation clock (HCLK) is used to operate
the CPU and peripheral functions.
Main clock mode
In this mode, the main clock, with the oscillation clock (HCLK) frequency divided by 2 is used
to operate the CPU and peripheral functions. In the main clock mode, the PLL multiplier
circuit is inactive.
Sub-clock mode
In this mode, the sub-clock, with the sub-clock (SCLK) frequency divided by 4 is used to
operate the CPU and peripheral functions. In the sub-clock mode, the main clock and PLL
multiplier circuit are inactive.
Reference
For the clock mode, see Section 4.4 "Clock Mode" of the MB90370 series H/W manual.
● CPU Intermittent Operating Mode
In this mode, the CPU is operated intermittently while high-speed clock pluses are supplied to
peripheral functions, thereby reducing power consumption. In this mode, intermittent clock
pulses are supplied only to the CPU while it is accessing a register, internal memory,
peripheral function, or external unit.
● Standby Mode
In this mode, the low-power consumption control circuit stops supplying the clock to the CPU
(sleep mode) or the CPU and peripheral functions (timebase timer mode) or stops the
oscillation clock itself (stop mode), thereby reducing power consumption.
PLL sleep mode
The PLL sleep mode is activated to stop the CPU operating clock in the PLL clock mode.
Components excluding the CPU operate on the PLL clock.
Main sleep mode
The main sleep mode is activated to stop the CPU operating clock in the main clock mode.
Components excluding the CPU operate on the main clock.
Sub-sleep mode
The sub-sleep mode is activated to stop the CPU operating clock in the sub-clock mode.
Components excluding the CPU operate on the divided-by-four sub-clock.
Timebase timer mode
The timebase timer mode causes the operation of functions, excluding the oscillation clock,
timebase timer, and watch timer, to stop. All functions other than the timebase timer and
watch timer are inactivated.
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