參數(shù)資料
型號： MB90F372PMT-G
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP144
封裝： 0.40 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù)： 108/153頁
文件大?。?/td> 2503K
代理商： MB90F372PMT-G
MB90370 Series
58
8.
I2C
The I2C (Inter IC Bus) interface is a simple structure bidirectional bus consisting of two wires : a serial data line
(SDA) and a serial clock line (SCL). Among the devices connected with these two wires, information is transmitted
to one another. By recognizing the unique address of each device, it can operate as a transmitting or receiving
device in accordance with the function of each device. Among these devices, the master/slave relation is
established.
The I2C interface can connect two or more devices to the bus provided the upper limit of the bus capacitance
does not exceed 400 pF. It is a full-fledged multi-master bus equipped with collision detection and communication
adjustment procedures designed to avoid the destruction of data if two or more masters attempt to start data
transfer simultaneously.
The communication adjustment procedure permits only one master to control the bus when two or more masters
attempt to control the bus so that messages are not lost or the contents of messages are not changed. Multi-
master means that multiple masters attempt to control the bus simultaneously without losing messages.
This I2C interface includes MCU standby mode wake-up function, and a CRC-8 calculator that performs automatic
Packet Error Code (PEC) generation and verification.
(1) Register configuration of I2C
(Continued)
76
5
4
3
2
1
0
Address: 000082H
Address: 000081H
15
14
13
12
11
10
9
8
I2C Bus Status Register (Lower)
I2C Bus Control Register (Upper)
IBSRL
IBCRH
Initial value
Read/write
Bit number
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Initial value
Read/write
Bit number
BER
MSS
ACK
GCAA
INTE
INT
Address: 000084H
76
5
4
3
2
1
0
I2C Data Register
IDAR
Bit number
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
Initial value
Read/write
D7
D6
D5
D4
D3
D2
D1
D0
R/W
0
BEIE
R
0
BB
R
0
RSC
R
0
AL
R
0
LRB
R
0
TRX
R
0
AAS
R
0
GCA
R
0
FBT
R/W
0
SCC
76
5
4
3
2
1
0
Address: 000080H
I2C Bus Control Register (Lower)
IBCRL
Initial value
Read/write
Bit number
R/W
0
PECE
R/W
0
LBT
R/W
0
WUE
Address: 000083H
15
14
13
12
11
10
9
8
I2C Bus Status Register (Upper)
IBSRH
Bit number
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Initial value
Read/write
WUF
PMATCH
-
TDR
TCR
MTR
STR
RES
R/W
0
R
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