參數(shù)資料
型號: MB89P637-SH
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PDIP64
封裝: SHRINK, DIP-64
文件頁數(shù): 22/153頁
文件大?。?/td> 7326K
代理商: MB89P637-SH
HARDWARE CONFIGURATION
2-95
2.2.12 Watchdog Timer Reset
Either of a signal output from the time-base timer for counting with the main clock or a signal output from
the watch prescaler for counting with the subclock can be selected as a clock.
(1) Registers
(2) Block diagram
Fig. 2.14 Block Diagram of Watchdog Timer
(3) Description of register
Watchdog timer control register (WDTE)
[Bit 7] CS: Clock source switching bit
Bit 7 is used to select a count clock from either the watch prescaler or time-base timer.
Set this bit as soon as the watchdog timer is started. Do not change the bit after the timer is started.
When using the submode, always select the watch prescaler.
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