375
15.4 Registers of the I
2
C
Table 15.4-1 Functions of Each Bit in I
2
C Bus Status Register (IBSR)
Bit name
Function
Bit 7
BB:
Bus busy bit
This bit indicates the state of the bus. This bit is cleared
when a stop condition is detected and set when a start
condition is detected.
Bit 6
RSC:
Repeated start condition
detection bit
This bit detects the repeated start condition. This bit is set
when a start condition is detected and cleared in the
following state.
"0" is written to the IBCR: INT bit
The slave address does not match the set address
A start condition is detected during bus stop
A stop condition is detected
Bit 5
AL:
Arbitration lost bit
This bit detects arbitration lost. This bit is set in the following
states.
Arbitration lost is detected when the master is transmitting
data
"1" is written to the IBCR: MSS bit when another system
is using the bus
This bit is also cleared when "0" is written to the IBCR: INT
bit
Bit 4
LRB:
Acknowledge storage bit
This bit stores the SDA line value of the 9th clock when the
data byte is transferred.
Cleared when an acknowledge bit is detected. (SDA = L)
Set when an acknowledge bit is not detected. (SDA = H)
Cleared with "0" when a start or stop condition is
detected.
Bit 3
TRX:
Data transfer state bit
This bit indicates whether the data transfer is performed in
the transmission mode or the reception mode.
Bit 2
AAS:
Addressing detection bit
This bit indicates addressing is performed in slave mode.
This bit is set when addressing is performed in slave mode
and cleared when a start or stop condition is detected.
Bit 1
GCA:
General call address
detection bit
This bit detects a general call address.
If this bit is set to "1" in slave mode, the general call address
(00H) is received.
This bit is cleared when a start or stop condition is detected.
Bit 0
FBT:
First byte detection bit
This bit detects the first byte
This bit is always set to "1" in the start condition.
This bit is set to "1" when a start condition is detected and
cleared when "0" is written to the IBCR: INT bit or when the
set address does not match its address in slave mode.