參數(shù)資料
型號(hào): MAXQ613J-0000+
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 12 MHz, RISC MICROCONTROLLER, QCC44
封裝: ROHS COMPLAINT, TQFN-44
文件頁(yè)數(shù): 26/28頁(yè)
文件大?。?/td> 1471K
代理商: MAXQ613J-0000+
16-Bit Microcontroller with Infrared Module
MAXQ613
_______________________________________________________________________________________ 7
SPI ELECTRICAL CHARACTERISTICS (continued)
(VDD = VRST to 3.6V, TA = 0NC to +70NC, unless otherwise noted.) (Note 11)
Note 1: Specifications to 0NC are guaranteed by design and are not production tested. Typical = +25NC, VDD = +3.3V, unless
otherwise noted.
Note 2: VPFW can be programmed to the following nominal voltage trip points: 1.8V, 1.9V, 2.55V, and 2.75V ±3%. The values
listed in the Recommended Operating Conditions table are for the default configuration of 1.8V nominal.
Note 3: The power-fail reset and POR detectors are designed to operate in tandem to ensure that one or both of these signals
is active at all times when VDD < VRST, ensuring the device maintains the reset state until minimum operating voltage is
achieved.
Note 4: Guaranteed by design and not production tested.
Note 5: Measured on the VDD pin and the device not in reset. All inputs are connected to GND or VDD. Outputs do not source/
sink any current. The device is executing code from flash memory.
Note 6: The power-check interval (PCI) can be set to always on, or to 1024, 2048, or 4096 nanopower ring clock cycles.
Note 7: Current consumption during POR when powering up while VDD is less than the POR release voltage.
Note 8: The minimum amount of time that VDD must be below VPFW before a power-fail event is detected; refer to the MAXQ610
User’s Guide for details.
Note 9: The maximum total current, IOH(MAX) and IOL(MAX), for all listed outputs combined should not exceed 32mA to satisfy the
maximum specified voltage drop. This does not include the IRTX output.
Note 10: Programming time does not include overhead associated with utility ROM interface.
Note 11: AC electrical specifications are guaranteed by design and are not production tested.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MOSI Input from SCLK
Sample Edge Transition Hold
tSIH
tSPI_RF
ns
MISO Output Valid After SCLK
Shift Edge Transition
tSOV
2tSPI_RF
ns
SSEL Inactive
tSSH
tCK +
tSPI_RF
ns
SCLK Inactive to SSEL Rising
tSD
tSPI_RF
ns
MISO Output Disabled After
SSEL Edge Rise
tSLH
2tCK +
2tSPI_RF
ns
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