參數資料
型號: MAXQ613J-0000+
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 12 MHz, RISC MICROCONTROLLER, QCC44
封裝: ROHS COMPLAINT, TQFN-44
文件頁數: 25/28頁
文件大小: 1471K
代理商: MAXQ613J-0000+
16-Bit Microcontroller with Infrared Module
MAXQ613
6 ______________________________________________________________________________________
RECOMMENDED OPERATING CONDITIONS (continued)
(VDD = VRST to 3.6V, TA = 0NC to +70NC, unless otherwise noted.) (Note 1)
SPI ELECTRICAL CHARACTERISTICS
(VDD = VRST to 3.6V, TA = 0NC to +70NC, unless otherwise noted.) (Note 11)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
WAKE-UP TIMER
Wake-Up Timer Interval
tWAKEUP
1/fNANO
65,535/
fNANO
s
FLASH MEMORY
System Clock During Flash
Programming/Erase
fFPSYSCLK
6
MHz
Flash Erase Time
tME
Mass erase
20
40
ms
tERASE
Page erase
20
40
Flash Programming Time per
Word
tPROG
(Note 10)
20
100
F
s
Write/Erase Cycles
20,000
Cycles
Data Retention
TA = +25NC
100
Years
IR
Carrier Frequency
fIR
(Note 4)
fCK/2
Hz
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SPI Master Operating
Frequency
1/tMCK
fCK/2
MHz
SPI Slave Operating
Frequency
1/tSCK
fCK/4
MHz
SPI I/O Rise/Fall Time
tSPI_RF
CL = 15pF, pullup = 560W
8.3
23.6
ns
SCLK Output Pulse-Width
High/Low
tMCH, tMCL
tMCK/2 -
tSPI_RF
ns
MOSI Output Hold Time After
SCLK Sample Edge
tMOH
tMCK/2 -
tSPI_RF
ns
MOSI Output Valid to Sample
Edge
tMOV
tMCK/2 -
tSPI_RF
ns
MISO Input Valid to SCLK
Sample Edge Rise/Fall Setup
tMIS
25
ns
MISO Input to SCLK Sample
Edge Rise/Fall Hold
tMIH
0
ns
SCLK Inactive to MOSI
Inactive
tMLH
tMCK/2 -
tSPI_RF
ns
SCLK Input Pulse-Width High/
Low
tSCH, tSCL
tSCK/2
ns
SSEL Active to First Shift
Edge
tSSE
tSPI_RF
ns
MOSI Input to SCLK Sample
Edge Rise/Fall Setup
tSIS
tSPI_RF
ns
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