參數(shù)資料
型號(hào)： MAXQ3120-FFN+
廠(chǎng)商： Maxim Integrated Products
文件頁(yè)數(shù)： 20/33頁(yè)
文件大小： 0K
描述： IC MCU 32KB FLASH 80-MQFP
標(biāo)準(zhǔn)包裝： 66
系列： MAXQ®
核心處理器： RISC
芯體尺寸： 16-位
速度： 8MHz
連通性： UART/USART
外圍設(shè)備： LCD，POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 32KB（16K x 16）
程序存儲(chǔ)器類(lèi)型： 閃存
RAM 容量： 512 x 8
電壓 - 電源 (Vcc/Vdd)： 2.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 80-BQFP
包裝： 托盤(pán)
Analog Front-End
The MAXQ3120 microcontroller incorporates an analog
front-end for dedicated analog-to-digital conversion.
This peripheral converts and digitally filters two differ-
ential signal channels with no CPU overhead.
The two conversion channels operate completely in
parallel, running at the same sample rate whether one
channel or both channels are enabled. If one or both
channels are not in use, they may be powered down to
conserve supply current.
The two input signals for each channel form a true differ-
ential pair. Each of the two signals (AN0+ and AN0- for
channel 0, AN1+ and AN1- for channel 1) can vary
across the entire +1V to -1V analog input range, without
regard to the level of the other signal in the pair. The ini-
tial stage for each channel is a programmable gain
function (1x, 16x) that can be set by software indepen-
dently for each channel. Next, a second-order sigma-
delta modulator samples each input signal.
When using both channels to measure the same signal
(as is the case when measuring voltage and current for
power calculations), a phase-correction buffer is pro-
vided to compensate for any phase shift between the
two channels caused by external circuitry. The phase-
correction buffer operates digitally on the output bit
stream of one of the two channels and can delay either
channel’s bit stream with respect to the other channel’s
bit stream by up to 140 bits.
Next, the bit streams for the two channels travel through
two digital sinc3 lowpass filters, which convert the bit
streams to 16-bit PCM values for additional processing.
MAXQ3120
High-Precision ADC
Mixed-Signal Microcontroller
____________________________________________________________________
27
Figure 6. Analog Front-End Block Diagram
CHANNEL 0
PROGRAMMABLE
GAIN
(1x, 16x)
AN0+
AN0-
AN1+
AN0-
CHANNEL1
PROGRAMMABLE
GAIN
(1x, 16x)
CHANNEL 0
SIGMA-DELTA
MODULATOR
CHANNEL 1
SIGMA-DELTA
MODULATOR
PHASE
CORRECTION
AD0
AD1
CHANNEL 0
SINC3
FILTER
CHANNEL 1
SINC3
FILTER
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