參數(shù)資料
型號(hào)： MAX9851ETM+T
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 43/71頁(yè)
文件大?。?/td> 0K
描述： IC CODEC AUDIO STEREO 48TQFN
標(biāo)準(zhǔn)包裝： 2,500
類型： 立體聲音頻
數(shù)據(jù)接口： 串行
分辨率（位）： 18 b
ADC / DAC 數(shù)量： 2 / 2
三角積分調(diào)變： 是
S/N 比，標(biāo)準(zhǔn) ADC / DAC (db)： 81.5 / 88
動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： 82 / 87.5
電壓 - 電源，模擬： 2.6 V ~ 3.3 V
電壓 - 電源，數(shù)字： 1.7 V ~ 3.3 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 48-TQFN-EP（7x7）
包裝： 帶卷 (TR)
MAX9851/MAX9853
Stereo Audio CODECs with Microphone, DirectDrive
Headphones, Speaker Amplifiers, or Line Outputs
48
______________________________________________________________________________________
Master Mode (S1MAS/S2MAS)
1 = Master mode (LRCLK and BCLK timing signals
generated internally; LRCLK and BCLK configured as
outputs).
0 = Slave mode (LRCLK and BCLK accepted from
external source; LRCLK and BCLK configured as
inputs).
Slave mode timing signals may operate asynchronous
to either the MCLK or the other audio interface source
in DAC-only stereo audio modes. An interface with the
ADC output enabled must operate in master mode,
unless operating synchronously in voice mode.
LRCLK Invert (S1WCI/S2WCI)
1 = Right-channel data is transmitted while LRCLK is
low.
0 = Left-channel data is transmitted while LRCLK is
low.
Set S1WCI/S2WCI = 0 to conform to the I2S standard.
S1WCI/S2WCI have no effect in voice mode.
BCLK Invert (S1BCI/S2BCI)
1 = Digital audio bits are transferred on the falling edge
of BCLK.
0 = Digital audio bits are transferred on the rising edge
of BCLK.
Set S1BCI/S2BCI = 0 to conform to the I2S standard.
Data Delay (S1DLY/S2DLY)
1 = Digital audio MSB on SDIN and SDOUT is trans-
ferred on the 2nd BCLK edge following an LRCLK edge.
0 = Digital audio MSB on SDIN and SDOUT is trans-
ferred on the 1st BCLK edge following an LRCLK edge.
Set S1DLY/S2DLY = 1 to conform to the I2S standard.
S1DLY/S2DLY have no effect in voice mode.
Word Size (S1WS/S2WS)
1 = 18-bit digital audio data.
0 = 16-bit digital audio data.
When operating in master mode, the number of BLCK
cycles per sample corresponds to the word size select-
ed by S1WS/S2WS. S1WS/S2WS have no effect in
voice mode.
MCLK Frequency Mode (MHz)
1 = 26MHz MCLK.
0 = 13MHz MCLK.
A 26MHz clock allows for synchronous 16kHz voice
mode. All other modes of operation can operate from
either MCLK frequency.
ADC DC-Blocking Filter Enable (ADCDC)
1 = ADC DC block enabled.
0 = ADC DC block disabled.
DC-blocking consists of a highpass filter with a cutoff
frequency of fS / 1608. This filter is available in all modes
of operation including voice modes. The ADC DC-
blocking filter can be overloaded with low-frequency
signals with DC offset greater than ±0.125V (one-eighth
full scale).
ADC Bandpass Filter Enable (ABPE)
1 = ADC bandpass filter enabled.
0 = ADC bandpass filter disabled.
ABPE = 1 enables the ADC highpass filter in combina-
tion with the ADC lowpass filter to create a bandpass
filter. The ADC voiceband filters only operate on the left
output channel data of voiceband, the ADC, and when
operating in voice mode.
DAC Bandpass Filter Enable (DBPE)
1 = DAC bandpass filter enabled.
0 = DAC bandpass filter disabled.
DBPE = 1 enables the DAC highpass filter in combina-
tion with the DAC lowpass filter to create a bandpass
filter. The DAC filters only operate on the S1 left input or
mono S1 L+R input signal data.
Left and Right DAC Highpass Filter Mode
(DHPL/DHPR)
00 = No filtering.
01 = 55Hz to 91Hz cutoff frequency.
10 = 171Hz to 279Hz cutoff frequency.
11 = 327Hz to 533Hz cutoff frequency.
When both the ADC and DAC are enabled, the exact
cutoff frequency of each setting depends on the sam-
ple rate in use. In DAC-only mode, the exact cutoff fre-
quency will be the high end of the range above.
Table 14. Digital Filter
REG
B7
B6
B5
B4
B3
B2
B1
B0
0x07
MHZ
ADCDC
ABPE
DBPE
DHPL
DHPR
Digital Filter Register (0x07)
相關(guān)PDF資料
PDF描述
MAX9856ETL+T IC AUDIO CODEC 40TQFN-EP
MAX9860ETG+T IC CODEC MONO AUD 16BIT 24TQFN
MAX9867ETJ+T IC STEREO AUD CODEC LP 32TQFN-EP
MAX9880AETM+ IC CODEC AUDIO STEREO 48TQFN
MB86064PB-GE1 DAC 14BIT 1GSA/S DUAL 12-EFBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX9851EVCMODU 功能描述:音頻 IC 開(kāi)發(fā)工具 Evaluation Kit/Evaluation System for the MAX9851 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
MAX9851EVKIT 功能描述:音頻 IC 開(kāi)發(fā)工具 Evaluation Kit/Evaluation System for the MAX9851 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
MAX9853ETM+ 功能描述:接口—CODEC Stereo Audio CODEC w/DirectDrive Amp RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
MAX9853ETM+T 功能描述:接口—CODEC Stereo Audio CODEC w/DirectDrive Amp RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
MAX9853EVCMODU 功能描述:音頻 IC 開(kāi)發(fā)工具 Evaluation Kit/Evaluation System for the MAX9853 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*