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參數(shù)資料
| 型號： | MAX9485EUP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK GEN PROG 20TSSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 類型： | 時鐘發(fā)生器 |
| PLL： | 是 |
| 輸入： | LVCMOS，LVTTL，晶體 |
| 輸出： | LVCMOS，LVTTL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:3 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 73.728MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
MAX9485
Programmable Audio Clock Generator
_______________________________________________________________________________________
7
Functional Diagram
MCLK
CLK_OUT1
SCL/FS0
SDA/FS1
FS2
CLK_OUT2
VDD
COUNTER N
PHASE
DETECTOR
AND LOOP
FILTER
VCO
PLL
DIVIDING
COUNTER
CONTROL
REGISTERS
COUNTER M
RESET
VCXO
TUN
X1
X2
MODE
RST
MAX9485
VDD_P
GND
GND_P
SAO1 SAO2
Detailed Description
The MAX9485 uses an input reference frequency of
27MHz from a crystal or system reference clock. The
device provides two buffered clock outputs of 256, 384,
or 768 times the chosen sampling frequency (fS) select-
ed through an I2C interface or hardwired inputs.
Sampling frequencies of 12kHz, 32kHz, 44.1kHz,
48kHz, 64kHz, 88.2kHz, or 96kHz are available. The
MAX9485 offers a buffered 27MHz output and an inte-
grated VCXO tuned by a DC voltage generated from the
MPEG system. The device operates with a 3.3V supply.
Reference and Output Clock
The MAX9485 uses the 27MHz crystal or reference
clock (master clock) from the audio system and gener-
ates an output of 256, 384, or 768 times the audio sys-
tem sampling frequency (fS). Connect a fundamental
mode crystal between X1 and X2 or drive X1 with a
27MHz system clock. The choices of sampling frequen-
cies are 12kHz, 32kHz, 44.1kHz, 48kHz, 64kHz,
88.2kHz, and 96kHz. The MAX9485 offers two identical
outputs: CLK_OUT1 and CLK_OUT2. In the following,
the CLK_OUT is used to refer to both outputs. Table 1
shows the relations of fS and the output frequency.
Select the output frequency by programming the I2C
register or hardwiring inputs FS0, FS1, and FS2.
CLK_OUT settling is typically 15ms from power-on or
from applying the clock to X1. Delay time from sampling
frequency change to CLK_OUT settling is 10ms (typ).
Figure 1 illustrates CLK_OUT transient timing in the I2C
programmed case. The I2C register is set through a
master-write data transfer. The frequency settling time
tFST is counted from the end of the next ACK pulse of
the written byte in SDA until the CLK_OUT is settled.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9485EVKIT | 制造商:Maxim Integrated Products 功能描述:PROGRAMMABLE AUDIO CLOCK GENERATOR - Bulk |
| MAX9486EUG | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 35.328MHz Clock Synthesizer RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MAX9486EUG-T | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 35.328MHz Clock Synthesizer RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MAX9486EVKIT | 制造商:Maxim Integrated Products 功能描述:8KHZ REFERENCE CLOCK SYNTHESIZER WI - Bulk |
| MAX9489ETJ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
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