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參數(shù)資料
| 型號(hào)： | MAX9325ETI |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC28 |
| 封裝： | 5 X 5 MM, 0.90 MM HEIGHT, EXPOSED PAD, MO-220, QFN-28 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 336K |
| 代理商： | MAX9325ETI |
MAX9325
2:8 Differential LVPECL/LVECL/HSTL Clock and
Data Driver
4
_______________________________________________________________________________________
AC ELECTRICAL CHARACTERISTICS
((VCC - VEE) = 2.375V to 3.8V, RL = 50
±1% to VCC - 2V, fIN ≤ 500MHz, input transition time = 125ps (20% to 80%). Typical values
are at (VCC - VEE) = 3.3V, VIH = (VCC - 1V), VIL = (VCC - 1.5V).) (Note 7)
-40
°C
+25
°C
+85
°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Differential
Input-to-Output
Delay
tPLHD
tPHLD
Figure 2
475
650
460
710
490
740
ps
Single-Ended
Input-to-Output
Delay
tPLH
tPHL
Figure 3 (Note 8)
440
780
430
790
450
800
ps
Output-to-
Output Skew
tSKOO
(Note 9)
50
ps
Part-to-Part
Skew
tSKPP
Differential input
(Note 10)
160
190
225
ps
Added Random
Jitter
tRJ
fIN = 0.5GHz
clock pattern
(Note 11)
1.5
psRMS
Added
Deterministic
Jitter
tDJ
fIN = 1.0Gbps,
2E
23 - 1 PRBS
pattern (Note 11)
100
psP-P
Switching
Frequency
fMAX
VOH - VOL
≥
300mV clock
pattern
700
1000
700
1000
700
1000
MHz
Output Rise/Fall
Time (20% to
80%)
tR, tF
Figure 2
140
440
140
440
140
440
ps
Note 1:
Measurements are made with the device in thermal equilibrium.
Note 2:
Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3:
DC parameters production tested at TA = +25
°C and guaranteed by design over the full operating temperature range.
Note 4:
Single-ended input operation using VBB is limited to (VCC - VEE) = 3.0V to 3.8V.
Note 5:
Use VBB only for inputs that are on the same device as the VBB reference.
Note 6:
All pins open except VCC and VEE.
Note 7:
Guaranteed by design and characterization. Limits are set at
±6 sigma.
Note 8:
Measured from the 50% point of the input signal with the 50% point equal to VBB, to the 50% point of the output signal.
Note 9:
Measured between outputs of the same part at the signal crossing points for a same-edge transition. Differential input signal.
Note 10: Measured between outputs of different parts under identical condition for same-edge transition.
Note 11: Device jitter added to the input signal. Differential input signal.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9325EVKIT | 制造商:Maxim Integrated Products 功能描述:2:8 DIFFERENTIAL LVPECL/LVECL/HSTL CLOCK AND DATA DRIVER - Boxed Product (Development Kits) |
| MAX9326EGI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX9326EQI | 制造商:Maxim Integrated Products 功能描述:1:9 DIFFERENTIAL LVPECL/LVECL/HSTL CLOCK AND - Rail/Tube |
| MAX9326EQI+ | 制造商:Maxim Integrated Products 功能描述:CLOCK AND DATA DRVR 28PLCC - Rail/Tube |
| MAX9326EQI+T | 制造商:Maxim Integrated Products 功能描述:CLOCK AND DATA DRVR 28PLCC - Tape and Reel |
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