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參數(shù)資料
| 型號： | MAX9321EKA+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 7/9頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK/DATA DRVR 1:1 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 時鐘/數(shù)據(jù)驅(qū)動器 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | HSTL，LVECL，LVPECL |
| 輸出： | LVECL，LVPECL |
| 頻率 - 最大： | 3GHz |
| 電源電壓： | 2.25 V ~ 3.8 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | * |
Detailed Description
The MAX9321/MAX9321A are low-skew differential
receiver/drivers designed for clock and data distribu-
tion. For interfacing to differential HSTL and LVPECL
signals, these devices operate over a +2.25V to +3.8V
supply range, allowing high-performance clock and
data distribution in systems with a nominal +2.5V or
+3.3V supply. For differential LVECL operation, these
devices operate from a -2.25V to -3.8V supply.
Inputs
The differential input can be configured to accept a sin-
gle-ended input when operating at approximately VCC -
VEE = 3.0V to 3.8V. This is accomplished by connect-
ing the on-chip reference voltage, VBB, to an input as a
reference. For example, the differential D, D input is
converted to a noninverting, single-ended input by con-
necting VBB to D and connecting the single-ended
input to D. An inverting input is obtained by connecting
VBB to D and connecting the single-ended input to D.
With the differential input configured as single ended
(using VBB), the single-ended input can be driven to
VCC and VEE or with a single-ended LVPECL/LVECL
signal.
When the differential input is configured as a single-
ended input (using VBB), the approximate supply range
is VCC - VEE = 3.0V to 3.8V. This is because one of the
inputs must be VEE + 1.2V or higher for proper opera-
tion of the input stage. VBB must be at least VEE + 1.2V
because it becomes the high-level input when the other
(single-ended) input swings below it. Therefore, mini-
mum VBB = VEE + 1.2V.
The minimum VBB output is VCC - 1.510V. Substituting
the minimum VBB into VBB = VEE + 1.2V results in a
minimum supply of 2.71V. Rounding up to a standard
supply gives the single-ended operating supply range
of VCC - VEE = 3.0V to 3.8V.
MAX9321/MAX9321A
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
_______________________________________________________________________________________
7
(CONNECTED TO D)
VIL
VIH
VBB
VOH - VOL
VOH
VOL
Q
D
Figure 1. Switching with Single-Ended Input
0 (DIFFERENTIAL)
80%
20%
80%
20%
0 (DIFFERENTIAL)
VOH - VOL
VIHD - VILD
VIHD
VILD
VOH
VOL
Q
tPLHD
tPHLD
tR
tF
D
(Q) - (Q)
Figure 2. Differential Transition Time and Propagation Delay Timing Diagram
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9321ESA | 制造商:Maxim Integrated Products 功能描述:DIFFERENTIAL LVPECL/LVECL/HSTL RECEIVER/DRIVE - Rail/Tube 制造商:Rochester Electronics LLC 功能描述: |
| MAX9321EUA | 制造商:Maxim Integrated Products 功能描述:DIFFERENTIAL LVPECL/LVECL/HSTL RECEIVER/DRIVE - Rail/Tube |
| MAX9321EUA+ | 功能描述:總線收發(fā)器 LVPECL/LVECL/HSTL Receiver/Driver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| MAX9321EUA+T | 功能描述:時鐘驅(qū)動器及分配 LVPECL/LVECL/HSTL Receiver/Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MAX9322ECY+ | 制造商:Maxim Integrated Products 功能描述:DIFFERENTIAL DIVIDE-BY-1/DIVIDE-BY-2 CLOCK DRVR 52TQFP - Rail/Tube |
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