參數(shù)資料
型號: MAX9316EWP-T
廠商: Maxim Integrated Products
文件頁數(shù): 7/12頁
文件大小: 0K
描述: IC CLOCK BUFFER MUX 2:5 20-SOIC
標(biāo)準(zhǔn)包裝: 1,000
類型: 扇出緩沖器(分配),多路復(fù)用器
電路數(shù): 1
比率 - 輸入:輸出: 2:5
差分 - 輸入:輸出: 是/是
輸入: HSTL,LVECL,LVPECL
輸出: LVECL,LVPECL
頻率 - 最大: 1.5GHz
電源電壓: 3 V ~ 3.8 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 20-SOIC W
包裝: 帶卷 (TR)
MAX9316
1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Driver
4
_______________________________________________________________________________________
Note 1: Measurements are made with the device in thermal equilibrium.
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3: DC parameters are production tested at TA = +25°C and guaranteed by design over the full operating temperature range.
Note 4: Use VBB only for inputs that are on the same device as the VBB reference.
Note 5: All pins are open except VCC and VEE.
Note 6: Guaranteed by design and characterization. Limits are set at ±6 sigma.
Note 7: Measured between outputs of the same part at the signal crossing points for a same-edge transition.
Note 8: Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transition.
Note 9: Device jitter added to a jitter-free input signal.
AC ELECTRICAL CHARACTERISTICS
(VCC - VEE = +3.0V to +3.8V, outputs are loaded with 50
±1% to VCC - 2V, input frequency = 1.5GHz, input transition time = 125ps
(20% to 80%), SEL = high or low, EN = low, VIHD = VEE + 1.2V to VCC, VILD = VEE to VCC - 0.15V, VIHD - VILD = 0.15V to 3V, unless
otherwise noted. Typical values are at VCC - VEE = +3.3V.) (Notes 1, 6)
-40
°C
+25
°C
+85
°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
CLK to Q_ Delay
(Differential)
tPLHD1,
tPHLD1
Figure 2
290
400
310
440
300
520
ps
SCLK to Q_ Delay
tPLHD3,
tPHLD3
VIL = VCC - 1.55V,
VIH = VCC - 1.09V,
Figure 3
290
400
310
440
300
520
ps
Output-to-Output
Skew (Note 7)
tSKOO
5
3020
4020
50
ps
Part-to-Part Skew
(Note 8)
tSKPP
110
130
220
ps
Added Random
Jitter (Note 9)
tRJ
fIN = 1.5GHz clock
0.8
1.2
0.8
1.2
0.8
1.2
ps (RMS)
Added
Deterministic Jitter
(Note 9)
tDJ
1.5Gbps 2E
23-1
PRBS pattern
50
70
50
70
50
70
ps (p-p)
Switching
Frequency
fMAX
(VOH - VOL)
≥ 400mV,
Figure 2
1.5
GHz
Output Rise/Fall
Time (20% to 80%)
tR, tF
Figure 2
80
120
90
130
90
145
ps
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