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參數(shù)資料
| 型號： | MAX9180EXT-T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package |
| 中文描述： | LINE TRANSCEIVER, PDSO6 |
| 封裝： | SC-70, 6 PIN |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 255K |
| 代理商： | MAX9180EXT-T |
M
Applications Information
Supply Bypassing
Bypass V
CC
with a high-frequency surface-mount ceram-
ic 0.01μF capacitor as close to the device as possible.
Differential Traces
Input and output trace characteristics affect the perfor-
mance of the MAX9180. Use controlled-impedance dif-
ferential traces. Ensure that noise couples as common
mode by running the traces within a differential pair
close together.
Maintain the distance within a differential pair to avoid
discontinuities in differential impedance. Avoid 90°
turns and minimize the number of vias to further prevent
impedance discontinuities.
Cables and Connectors
The LVDS standards define signal levels for intercon-
nect with a differential characteristic impedance and
termination of 100
. Interconnects with a characteristic
impedance and termination of 90
to 132
impedance
are allowed, but produce different signal levels (see the
Termination
section).
Use cables and connectors that have matched differen-
tial impedance to minimize impedance discontinuities.
Avoid the use of unbalanced cables, such as ribbon or
coaxial cable. Balanced cables, such as twisted pair,
offer superior signal quality and tend to generate less
EMI due to canceling effects. Balanced cables tend to
pick up noise as common mode, which is rejected by
the LVDS receiver.
Termination
For point-to-point links, the termination resistor should
be located at the LVDS receiver input and match the
differential characteristic impedance of the transmis-
sion line.
For a multidrop bus driven at one end, terminate at the
other end of the bus with a resistor that matches the
loaded differential characteristic impedance of the bus.
For a multidrop bus driven from a point other than the
end, terminate each end of the bus with a resistor that
matches the loaded differential characteristic imped-
ance of the bus. When terminating at both ends, or for a
large number of drops, a BLVDS driver is needed to
drive the bus to LVDS signal levels. The MAX9180 is
not intended to drive double-terminated multidrop
buses to LVDS levels.
The differential output voltage level depends upon the
differential characteristic impedance of the interconnect
and the value of the termination resistance. The
MAX9180 is guaranteed to produce LVDS output levels
into 100
. With the typical 3.6mA output current, the
MAX9180 produces an output voltage of 360mV when
driving a 100
transmission line terminated with a
100
termination resistor (3.6mA x 100
= 360mV). For
typical output levels with different loads, see the
Differential Output Voltage vs. Load Resistor curve in
the
Typical Operating Characteristics
.
Chip Information
TRANSISTOR COUNT: 401
PROCESS: CMOS
400Mbps, Low-Jitter, Low-Noise LVDS
Repeater in an SC70 Package
6
_______________________________________________________________________________________
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9181 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Low-Jitter.Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package |
| MAX9181EXT | 制造商:Maxim Integrated Products 功能描述:LOW-JITTER, LOW-NOISE LVPECL-TO-LVDS LEVEL TR - Cut Tape Product |
| MAX9181EXT-T | 制造商:Maxim Integrated Products 功能描述:LOW-JITTER, LOW-NOISE LVPECL-TO-LVDS LEVEL TR - Tape and Reel |
| MAX918ESA | 功能描述:校驗(yàn)器 IC RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類型: 通道數(shù)量: 輸出類型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補(bǔ)償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應(yīng)時間: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel |
| MAX918ESA+ | 功能描述:校驗(yàn)器 IC 1.8V nPower Comparator RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類型: 通道數(shù)量: 輸出類型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補(bǔ)償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應(yīng)時間: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel |
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