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參數(shù)資料
| 型號(hào)： | MAX9171EKA+T |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC RECEIVER LVDS LINE SOT23-8 |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 接收器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 0/1 |
| 規(guī)程： | LVDS |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-8 |
| 供應(yīng)商設(shè)備封裝： | SOT-23-8 |
| 包裝： | 帶卷 (TR) |
MAX9171/MAX9172
Detailed Description
LVDS Inputs
The MAX9171/MAX9172 feature LVDS inputs for inter-
facing high-speed digital circuitry. The LVDS interface
standard is a signaling method intended for point-to-
point communication over controlled-impedance
media, as defined by the ANSI TIA/EIA-644 standards.
The technology uses low-voltage signals to achieve fast
transition times and minimize power dissipation and
noise immunity. The MAX9171/MAX9172 convert LVDS
signals to LVCMOS/LVTTL signals at rates in excess of
500Mbps. These devices are capable of detecting dif-
ferential signals as low as 100mV and as high as 1.2V
within a 0 to VCC input voltage range. Table 1 is the
input-output function table.
Fail-Safe
The MAX9171/MAX9172 fail-safe drives the receiver
output high when the differential input is:
Open
Undriven and shorted
Undriven and terminated
Without fail-safe, differential noise at the input may
switch the receiver and appear as data to the receiving
system. An open input occurs when a cable and termi-
nation are disconnected. An undriven, terminated input
occurs when a cable is disconnected with the termina-
tion still connected across the receiver inputs or when
the driver of a receiver is in high impedance. An undriv-
en, shorted input can occur due to a shorted cable.
Single/Dual LVDS Line Receivers with
“In-Path” Fail-Safe
6
_______________________________________________________________________________________
MAX9171 Pin Description
PIN
SOT23
SO/TDFN
NAME
FUNCTION
18
VCC
Positive Power-Supply Input. Bypass with a 0.1F and a 0.001F capacitor to GND with the
smallest capacitor closest to the pin.
2
5
GND
Ground
3
7
OUT
Receiver Output
4, 5, 6
3, 4, 6
N.C.
No Connection. Not internally connected.
7
2
IN+
Noninverting Differential Receiver Input
8
1
IN-
Inverting Differential Receiver Input
—
(TDFN only)
EP
Exposed Paddle. Solder to PCB ground.
MAX9172 Pin Description
PIN
SOT23
SO/TDFN
NAME
FUNCTION
18
VCC
Positive Power-Supply Input. Bypass with a 0.1F and a 0.001F capacitor to GND with the
smallest capacitor closest to the pin.
2
5
GND
Ground
3
7
OUT1
Receiver Output 1
4
6
OUT2
Receiver Output 2
5
4
IN2-
Inverting Differential Receiver Input 2
6
3
IN2+
Noninverting Differential Receiver Input 2
7
2
IN1+
Noninverting Differential Receiver Input 1
8
1
IN1-
Inverting Differential Receiver Input 1
—
(TDFN only)
EP
Exposed Paddle. Solder to PCB ground.
INPUTS
OUTPUT
(IN_+) - (IN_-)
OUT_
≥ 0mV
High
≤ -100mV
Low
Open
High
Undriven short
High
Undriven parallel termination
High
Table 1. Input-Output Function Table
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9171ESA | 制造商:Maxim Integrated Products 功能描述:SINGLE/DUAL LVDS LINE RECEIVERS WITH IN-PATH" - Bulk |
| MAX9171ESA+ | 制造商:Maxim Integrated Products 功能描述:LINE RCVR 1RX 8SOIC N - Rail/Tube |
| MAX9171ESA+T | 制造商:Maxim Integrated Products 功能描述:LINE RCVR 1RX 8SOIC N - Tape and Reel |
| MAX9171ETA | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual LVDS Line Receivers with “In-Path” Fail-Safe |
| MAX9172 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual LVDS Line Receivers with “In-Path” Fail-Safe |
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