參數(shù)資料
型號(hào): MAX8554
廠商: Maxim Integrated Products, Inc.
英文描述: 4.5V to 28V Input. Synchronous PWM Buck Controllers for DDR Termination and Point-of-Load Applications
中文描述: 4.5V至28V輸入、同步PWM buck控制器,適合DDR端接和負(fù)載點(diǎn)應(yīng)用
文件頁(yè)數(shù): 21/24頁(yè)
文件大?。?/td> 483K
代理商: MAX8554
M
4.5V to 28V Input, Synchronous PWM Buck Controllers
for DDR Termination and Point-of-Load Applications
______________________________________________________________________________________
21
Setting Voltage Positioning
The droop resistor, R
DRP
(R4) in
Figure
2, in series with
the output inductor before the output capacitor, sets the
droop voltage, V
DRP
. Choose R
DRP
such that the output
voltage at the maximum load current, including ripple, is
just above the lower limit of the output tolerance:
R
DRP
introduces some power dissipation, which is
given by:
R
DRP
should be chosen to handle this power dissipation.
Power MOSFET Selection
The MAX8553/MAX8554 drive external, logic-level, N-
channel MOSFETs as the circuit-switch elements. The
key selection parameters are:
On-resistance (R
DS(ON)
):
The lower, the better.
Maximum drain-to-source voltage (V
DSS
):
This
should be at least 20% higher than the input supply rail
at the high-side MOSFET
s drain.
Gate charges (Q
G
, Q
GD
, Q
GS
):
The lower, the better.
Choose the MOSFETs with rated R
DS(ON)
at V
GS
= 4.5V.
For a good compromise between efficiency and cost,
choose the high-side MOSFET that has a conduction
loss equal to switching loss at nominal input voltage and
maximum output current (see below). For the low-side
MOSFET, make sure that it does not spuriously turn on
because of the dV/dt caused by the high-side MOSFET
turning on, as this would result in shoot-through current
degrading the efficiency. MOSFETs with a lower Q
GD
to
Q
GS
ratio have higher immunity to dV/dt.
For proper thermal-management design, calculate the
power dissipation at the desired maximum operating
junction temperature, maximum output current, and
worst-case input voltage (for low-side MOSFET, worst
case is at V
IN(MAX)
; for high-side MOSFET, it could be
either at V
IN(MIN)
or V
IN(MAX)
). The high-side MOSFET
and low-side MOSFET have different loss components
due to the circuit operation. The low-side MOSFET
operates as a zero voltage switch; therefore, major
losses are: the channel conduction loss (P
LSCC
), the
body-diode conduction loss (P
LSDC
), and the gate-
drive loss (P
LSDR
):
Use R
DS(ON)
at T
J(MAX):
where V
F
is the body-diode forward-voltage drop, t
DT
is
the dead time (~30ns), and f
S
is the switching frequency.
Because of the zero-voltage switch operation, low-side
MOSFET gate-drive loss occurs as a result of charging
and discharging the input capacitance (C
ISS
). This loss
is distributed among the average DL gate driver
s
pullup and pulldown resistance, R
DL
(~1.2
), and the
internal gate resistance (R
GATE
) of the MOSFET (~2
).
The drive power dissipated is given by:
The high-side MOSFET operates as a duty-cycle con-
trol switch and has the following major losses: the
channel conduction loss (P
HSCC
), the VI overlapping
switching loss (P
HSSW
), and the drive loss (P
HSDR
).
The high-side MOSFET does not have body-diode con-
duction loss because the diode never conducts current.
P
C
V
f
R
R
R
LSDR
ISS
GS
S
GATE
+
GATE
DL
=
×
(
)
×
×
2
P
I
V
t
f
LSDC
LOAD
F
DT
S
= ×
2
×
×
×
P
V
V
I
R
LSCC
OUT
IN
LOAD
DS ON
(
=
×
(
)
×
)
1
2
-
P
R
I
D DRP
(
DRP
OUT MAX
(
)
)
=
×
(
)
2
R
V
V
I
V
DRP
OUT TYP
(
OUT MIN
(
RIPPLE
OUT MAX
(
<
/
)
)
)
-
-
2
MAX8553
GND
FSEL
ILIM
REF
EN/HSD
REFIN
V+
POK
VTTR
VTT
PGND
DL
LX
DH
BST
VL
R2
R6
10k
Q3
2N7002
SDN
R1
VIN
Figure
6. A resistor-divider (R1 and R2) is used to lower the
switching frequency.
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