I2C Port Expander with Eight Push-Pull Outputs and Eight Inputs ________" />
參數(shù)資料
型號(hào): MAX7324ATG+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 3/20頁(yè)
文件大小: 0K
描述: IC I/O EXPANDER I2C 8B 24TQFN-EP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
接口: I²C
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時(shí)鐘: 400kHz
電源電壓: 1.71 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 24-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 24-TQFN-EP(4x4)
包裝: 帶卷 (TR)
包括: POR
MAX7324
I2C Port Expander with Eight Push-Pull Outputs
and Eight Inputs
______________________________________________________________________________________
11
Acknowledge
The acknowledge bit is a clocked 9th bit the recipient
uses to acknowledge receipt of each byte of data
(Figure 4). Each byte transferred effectively requires 9
bits. The master generates the 9th clock pulse, and the
recipient pulls down SDA during the acknowledge
clock pulse, such that the SDA line is stable low during
the high period of the clock pulse. When the master is
transmitting to the MAX7324, the MAX7324 generates
the acknowledge bit because the MAX7324 is the
recipient. When the MAX7324 is transmitting to the
master, the master generates the acknowledge bit
because the master is the recipient. The master does
not generate an acknowledge prior to issuing a stop
condition.
Slave Address
The MAX7324 has two different 7-bit slave addresses
(Tables 2 and 3). The addresses are different for com-
municating to either the eight push-pull outputs or the
eight inputs. The eighth bit following the 7-bit slave
address is the R/W bit. It is low for a write command
and high for a read command.
The first (A6), second (A5), and third (A4) bits of the
MAX7324 slave address are always 1, 1, and 0 (I0–I7)
or 1, 0, and 1 (O8–O15). Connect AD0 and AD2 to
GND, V+, SDA, or SCL to select the slave address bits
A3, A2, A1, and A0. The MAX7324 has 16 possible
slave address pairs (Tables 2 and 3), allowing up to 16
MAX7324 devices on an I2C bus.
Accessing the MAX7324
The MAX7324 is accessed though an I2C interface. The
MAX7324 provides two different 7-bit slave addresses
for either the eight input ports (I0–I7) or the eight push-
pull ports (O8–O15). See Tables 2 and 3.
A
single-byte read from the input ports of the
MAX7324 returns the status of the eight ports and
clears both the internal transition flags and the INT out-
put. A single-byte read from the output ports of the
MAX7324 returns the status of the eight output ports,
read back as inputs.
A
2-byte read from the input ports of the MAX7324
returns the status of the eight ports (as for a single-byte
read), followed by the transition flags. The internal tran-
sition flags and the INT output are cleared when the
MAX7324 acknowledges the slave address byte, but
the previous transition flag data is sent as the second
byte. A 2-byte read from the output ports of the
MAX7324 repeatedly returns the status of the eight out-
put ports, read back as inputs.
A
multibyte read (more than 2 bytes before the I2C
STOP bit) from the input ports of the MAX7324 repeat-
edly returns the port data, alternating with the transition
flags. As the input data is resampled for each transmis-
sion, and the transition flags are reset each time, a
multibyte read continuously returns the current data
and identifies any changing input ports.
SCL
SDA BY
TRANSMITTER
CLOCK PULSE
FOR ACKNOWLEDGEMENT
START
CONDITION
SDA BY
RECEIVER
12
89
S
Figure 4. Acknowledge
SDA
SCL
.
1A5
A3
A2
A1
A0
A4
R/W
MSB
LSB
ACK
Figure 5. Slave Address
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