參數(shù)資料
型號: MAX7319
廠商: Maxim Integrated Products, Inc.
英文描述: 4-Bit D-type Registers with 3-State Outputs 16-CFP -55 to 125
中文描述: I²C端口擴展器,具有8路輸入,可屏蔽瞬態(tài)檢測
文件頁數(shù): 12/16頁
文件大?。?/td> 251K
代理商: MAX7319
Writing to the MAX7319
A write to the MAX7319 starts with the master transmit-
ting the MAX7319
s slave address with the R/
W
bit set
low. The MAX7319 acknowledges the slave address,
and samples the input ports during the acknowledge
bit.
INT
deasserts during the slave address acknowl-
edge. The master can now transmit 1 or more bytes of
data. The MAX7319 acknowledges these subsequent
bytes of data and updates the interrupt mask register
with each new byte until the master issues a STOP con-
dition (Figure 8).
Applications Information
Port Input and I
2
C Interface Level
Translation from Higher or Lower
Logic Voltages
The MAX7319 I
2
C interface (SDA, SCL, AD0, AD2),
reset input
RST
, interrupt output
INT
, and the eight
input ports I0
I7 are overvoltage protected to +6V inde-
pendent of V+. This allows the MAX7319 to operate
from a lower supply voltage, such as +3.3V, while the
I
2
C interface and/or any of the eight input ports are dri-
ven from a higher logic level, such as +5V.
The MAX7319 can operate from a higher supply volt-
age, such as +3V, while the I
2
C interface and/or some
of the input ports I0
I7 are driven from a lower logic
level, such as +2.5V. Apply a minimum voltage of 0.7 x
V+ to assert a logic-high on any input. For example, a
MAX7319 operating from a +5V supply may not recog-
nize a +3.3V nominal logic-high. One solution for input
level translation is to drive the MAX7319 inputs from
open-drain outputs. Use a pullup resistor to V+ or a
higher supply to ensure a high logic voltage of greater
than 0.7 x V+.
Hot Insertion
RST
, SCL, SDA, AD0, and AD2 remain high impedance
with up to +6V asserted on them when the MAX7319 is
powered down (V+ = 0). The MAX7319 can therefore
be used in hot-swap applications.
Each of the input ports I0
I7 has a protection diode to
GND (Figure 9). When a port input is driven to a voltage
lower than GND, the protection diode clamps the volt-
age to a diode drop below GND.
Each of the input ports I0
I7 also has a 40k
(typ)
pullup resistor that can be enabled or disabled. When a
port input is driven to a voltage higher than V+
,
the
body diode of the pullup enable switch conducts and
the 40k
pullup resistor is enabled. When the
MAX7319 is powered down (V+ = 0), every input port
appears as a 40k
resistor in series with a diode con-
nected to GND. Input ports are protected to +6V under
any of these circumstances (Figure 9).
M
I
2
C Port Expander with Eight Inputs and
Maskable Transition Detection
12
______________________________________________________________________________________
P
I0–I7
PULLUP
ENABLE
INPUT
40k
MAX7319
V+
V+
Figure 9. Input Port Structure
SCL
SDA
START CONDITION
R/W
SLAVE ADDRESS
S
0
1
2
3
4
5
6
7
8
A
A
A
t
PV
DATA 1
DATA 2
t
PV
DATA TO INTERRUPT MASK
DATA TO INTERRUPT MASK
Figure 8. Writing to the MAX7319
S = START CONDITION
P = STOP CONDITION
SHADED = SLAVE TRANSMISSION
N = NOT ACKNOWLEDGE
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