參數(shù)資料
型號: MAX6876ETX+
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 電源管理
英文描述: EEPROM-Programmable, Quad, Power-Supply Tracker/Sequencer Circuit
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, QCC36
封裝: 6 X 6 MM, 0.80 MM HEIGHT, MO-220WJJD-1, TQFN-36
文件頁數(shù): 16/39頁
文件大?。?/td> 425K
代理商: MAX6876ETX+
MAX6876
EEPROM-Programmable, Quad,
Power-Supply Tracker/Sequencer Circuit
______________________________________________________________________________________
23
Bus Removal Output (REM)
The MAX6876 features an open-drain bus removal
(REM) output. REM signals when it is safe to remove
the card after a controlled track/sequence power-down
operation. To initiate a power-down, drive ENABLE low
or send an I2C power-down command. REM monitors
OUT_ and when any of the OUT_ voltages are above
the VTH_PL threshold, REM stays low. When all OUT_
outputs are below VTH_PL, REM goes high impedance.
Connect REM to an external pullup resistor/LED chain
to visually signal when it is safe to remove a powered
board from the bus.
In tracking mode when REM is used in master/slave
operations, connect all REM pins together. The com-
mon REM connection remains low if any OUT_ supply
is above the VTH_PL threshold.
Overcurrent Output (OC)
The open-drain, active-low OC output asserts low if an
overcurrent condition is detected in any selected channel
for longer than tOC. Overcurrent conditions are deter-
mined as a differential voltage between IN_ and OUT_.
OC monitoring begins only after supply tracking or
sequencing has been completed and is disabled during
power-down operation (Table 12).
Reset Output (RESET)
The reset output, RESET, is an open-drain output that
monitors the selected OUT_ voltages. The selected
OUT_ voltages must exceed their selected PG_ thresh-
olds for the selected reset timeout period (tRP) before
RESET is deasserted. A manual reset input (MR) can
assert RESET. RESET remains low while MR is low.
RESET remains low for the selected reset timeout peri-
od (tRP) after MR transitions from low to high (Table 13).
Synchronization Hold Output (HOLD)
The MAX6876 features an open-drain, active-low syn-
chronization alert output/input. HOLD communicates
synchronization status between master/slave devices in
multiple MAX6876 applications. When a slave device
detects a tracking problem with respect to the master
SYNCH signal, the slave asserts HOLD low. When
tracking is back under control, the slave’s HOLD is
deasserted and goes high again. The HOLD output
remains asserted while selected tracking IN_ inputs are
below their selected thresholds (the slave device can
delay a tracking start until its inputs are at their required
stable voltage levels) or held low by the master when it
is counting the autoretry time after a detected fault con-
dition. Connect HOLD pins only to other MAX6876
HOLD pins.
REGISTER
ADDRESS
EEPROM MEMORY
ADDRESS
BIT RANGE
DESCRIPTION
“00” IN4 to OUT4 power-good threshold = 95%
“01” IN4 to OUT4 power-good threshold = 92.5%
“10” IN4 to OUT4 power-good threshold = 90%
[7:6]
“11” IN4 to OUT4 power-good threshold = 87.5%
“00” IN3 to OUT3 power-good threshold = 95%
"01" IN3 to OUT3 power-good threshold = 92.5%
“10” IN3 to OUT3 power-good threshold = 90%
“11” IN3 to OUT3 power-good threshold = 87.5%
“00” IN2 to OUT2 power-good threshold = 95%
“01” IN2 to OUT2 power-good threshold = 92.5%
“10” IN2 to OUT2 power-good threshold = 90%
“11” IN2 to OUT2 power-good threshold = 87.5%
“00” IN1 to OUT1 power-good threshold = 95%
“01” IN1 to OUT1 power-good threshold = 92.5%
“10” IN1 to OUT1 power-good threshold = 90%
10h
30h
[5:0]
“11” IN1 to OUT1 power-good threshold = 87.5%
Table 11. PG Threshold Settings
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MAX6876EVCMOD2 功能描述:監(jiān)控電路 Programmers, Development Systems RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
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