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參數(shù)資料
| 型號： | MAX6621AUB+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 16/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TRANSL PECI TO I2C 10-UMAX |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 邏輯功能： | * |
| 位數(shù)： | * |
| 輸入類型： | PECL |
| 輸出類型： | I²C? |
| 數(shù)據(jù)速率： | 400kbs |
| 通道數(shù)： | 1 |
| 輸出/通道數(shù)目： | * |
| 差分 - 輸入:輸出： | * |
| 傳輸延遲（最大）： | * |
| 電源電壓： | * |
| 工作溫度： | -20°C ~ 120°C |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-µMAX |
| 包裝： | 管件 |
CONFIG0
The CONFIG0 register holds a bit mask for sockets and
domains that are enabled for polling as well as a
polling delay (minimum delay between sets of polls)
and features enable/disable bits. Table 2 shows the
various options for CONFIG0.
The optional polling delay (bits 2:0) inserts after polling
the set of all sockets and domains that are enabled in
bits 15:8 with a minimal pause of 2.5ms between PECI
reads. After polling all enabled sockets and domains,
the device pauses PECI communications for the config-
ured time before starting to poll the set of enabled
sockets and domains again. Table 3 shows the various
polling delay options.
CONFIG1
The CONFIG1 register configures the maximum num-
ber of retries before aborting a PECI temperature read
as well as the originated (suggested) PECI bit time.
Table 4 shows the various options for CONFIG1.
MAX6621
PECI-to-I2C Translator
_______________________________________________________________________________________
7
BIT(S)
DESCRIPTION
DEFAULT
15:8
Polling enable for sockets and domains
00h
15
1 = enable socket 3, domain 1
0
14
1 = enable socket 3, domain 0
0
13
1 = enable socket 2, domain 1
0
12
1 = enable socket 2, domain 0
0
11
1 = enable socket 1, domain 1
0
10
1 = enable socket 1, domain 0
0
9
1 = enable socket 0, domain 1
0
8
1 = enable socket 0, domain 0
0
7
1 = enable I2C bus lockup timeout
0 = disable timeout
1
6
1 = alternate data representation
0 = 16-bit data representation
0
5
1 = enable I2C packet error checksum
(PEC) on device return data
0 = disable PEC
1
4
1 = mask temperature alerts
0 = activate alerts
0
3
Reserved, set to 0
0
2:0
Poll delay, see Table 3
5
Table 2. CONFIG0 Register
POLL DELAY VALUE
DELAY BETWEEN POLLS (ms)
0
Polling on request only
1
2.5
25
310
450
5
100 (default)
6
500
7
Reserved
Table 3. Polling Delay
BIT(S)
DESCRIPTION
DEFAULT
15:8
Originated PECI bit time
(before negotiation)
01h: RESERVED
14h…0FFh: CONFIG1[15:8] + 1μs
Minimum: 14h (= 21μs/47.62kHz)
Maximum: 0FFh (= 256μs/3.906kHz)
02h
7:0
Maximum number of retries for PECI
transactions
03h
Table 4. CONFIG1 Register
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參數(shù)描述 |
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| MAX6621AUB+ | 功能描述:轉(zhuǎn)換 - 電壓電平 MAX6621 PROTOCOL CONVERTER USOP PB RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
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