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參數(shù)資料
| 型號： | MAX5858ECM+TD |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 9/23頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 10BIT DUAL 300MSPS 48TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 設(shè)置時(shí)間： | 11ns |
| 位數(shù)： | 10 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 816mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP 裸露焊盤（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 300M |
MAX5858
Dual, 10-Bit, 300Msps, Current-Output DAC with
4x/2x/1x Interpolation Filters
______________________________________________________________________________________
17
IFS
CCOMP*
REFR
IREF
REFO
MAX4040
1.24V
BANDGAP
REFERENCE
CURRENT-
SOURCE ARRAY
*COMPENSATION CAPACITOR (CCOMP
≈ 100nF).
OPTIONAL EXTERNAL BUFFER
FOR HEAVIER LOADS
REN
MAX5858
IREF =
VREF
RSET
AGND
Figure 4. Setting IFS with the Internal 1.24V Reference and the Control Amplifier
Clocking Modes
Apply an external clock to CLKXP and CLKXN at the
desired DAC update rate and allowable input ampli-
tude. CLK is an output and provides the signal neces-
sary to synchronize the input data. CLKXP and CLKXN
accept a frequency range of 0 to 300MHz (see Table
5). Maintain a low capacitive load at the CLK output
(not higher than 10pF for fCLK of 165MHz).
Internal Reference and Control Amplifier
The MAX5858 provides an integrated 50ppm/°C, 1.24V,
low-noise bandgap reference that can be disabled and
overridden with an external reference voltage. REFO
serves either as an external reference input or an inte-
grated reference output. If REN is connected to AGND,
the internal reference is selected and REFO provides a
1.24V (50A) output. Buffer REFO with an external
amplifier, when driving a heavy load.
The MAX5858 also employs a control amplifier
designed to simultaneously regulate the full-scale out-
put current (IFS) for both outputs of the devices.
Calculate the output current as:
IFS = 32 IREF
where IREF is the reference output current (IREF =
VREFO/RSET) and IFS is the full-scale output current.
RSET is the reference resistor that determines the ampli-
fier output current of the MAX5858 (Figure 4). This cur-
rent is mirrored into the current-source array where IFS
is equally distributed between matched current seg-
ments and summed to valid output current readings for
the DACs.
External Reference
To disable the internal reference of the MAX5858, con-
nect REN to AVDD. Apply a temperature-stable, external
reference to drive the REFO to set the full-scale output
(Figure 5). For improved accuracy and drift performance,
choose a fixed output voltage reference such as the
1.24V, 25ppm/°C MAX6520 bandgap reference.
Detailed Timing
The MAX5858 accepts an input data rate up to 165MHz
or the DAC conversion rate of 300MHz. The input latch-
es on the rising edge of the clock, whereas the output
latches on the following rising edge.
Figure 6 depicts the write cycle of the DACs in 4x inter-
polation mode. In this timing diagram, signals applied
to CLKXP and CLKXN are divided by four to create the
DAC’s CLK signal. The MAX5858 DAC output is updat-
ed at the rate of the clock applied to CLKXP/CLKXN.
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