參數(shù)資料
型號: MAX5755UTN+T
廠商: Maxim Integrated Products
文件頁數(shù): 14/25頁
文件大?。?/td> 0K
描述: IC DAC 14BIT 32CHAN SER 56-TQFN
標準包裝: 2,500
設置時間: 20µs
位數(shù): 14
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 32
電壓電源: 模擬和數(shù)字
工作溫度: 0°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-WFQFN 裸露焊盤
供應商設備封裝: 56-TQFN-EP(8x8)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 32 電壓,單極
采樣率(每秒): *
MAX5753/MAX5754/MAX5755
32-Channel, 14-Bit, Voltage-Output
DACs with Serial Interface
______________________________________________________________________________________
21
Read-Data Format
The MAX5753/MAX5754/MAX5755 support daisy-chain
connections of multiple devices. The default (power-up)
configuration for the MAX5753/MAX5754/MAX5755
assumes that the device may be part of a daisy chain
of devices. DOUT follows DIN after 32 clock cycles. For
a read command, DOUT provides read data (instead of
the data value shifted in) in the next cycle following a
CS rising edge. Figures 5 and 6 show examples of
daisy-chain data sequences.
Shutdown Mode
The MAX5753/MAX5754/MAX5755 feature a software-
controlled low-power shutdown mode. When bit 9 of the
configuration register is a logic high, the analog section
of the device is disabled, and the outputs go high
impedance. In shutdown, supply current is reduced to
50A. Data stored in the DAC and input registers is
retained, and the device outputs return to their previous
values when the device is brought out of shutdown. The
serial interface remains active while the device is in
shutdown.
Power-Up State
The MAX5753/MAX5754/MAX5755 monitor the four power
supplies and maintain the output buffers in a known state
until sufficient voltage is available to ensure that no output
glitches occur. Once the minimum voltage threshold has
been passed, the device outputs come up in the clear
state (all outputs = 0). For proper power sequencing, VSS
must be applied first. Power sequencing is not necessary
if VSS is connected to AGND.
CONTROLLER
DEVICE
DIN
DOUT
1 OR 0
SCLK
CS
MAX575_
DSP
Figure 7. Stand-Alone Configuration
CONTROLLER
DEVICE
DIN
DOUT
1 OR 0
SCLK
CS
MAX575_
DIN
DOUT
SCLK
CS
MAX575_
DIN
DOUT
SCLK
CS
MAX575_
DSP
Figure 8. Example of a Parallel Configuration with Read-Back
C1
C2
C0 A5 A4 A3 A2
A1 A0 Sp Sp
Sp Sp Sp Sp Sp D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 S1 S0
D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 S1 S0
DIN(0)
SCLK
CS (
C)
CS (DSP)
DOUT(0)
OR
Figure 9. Read Data Timing When Not Daisy-Chained
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