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參數(shù)資料
| 型號： | MAX555CQK |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | DAC |
| 英文描述： | 300Msps, 12-Bit DAC with Complementary Voltage Outputs |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 0.015 us SETTLING TIME, 12-BIT DAC, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大小： | 98K |
| 代理商： | MAX555CQK |
M
300Msps, 12-Bit DAC with
Complementary Voltage Outputs
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Analog Supply Voltage (AV
EE
).................................-7V to +0.3V
Digital Supply Voltage (DV
EE
)..................................-7V to +0.3V
Digital Input Voltage (D0–D11)...................................-5.5V to 0V
Reference Input Voltage (V
IN
).................................0V to +1.25V
Reference Input Current....................................0mA to +1.56mA
Output Compliance Voltage (V
OC
)......................-1.25V to +1.0V
Output Common-Mode Voltage (V
CM
)................-0.25V to +1.0V
ELECTRICAL CHARACTERISTICS
(AV
EE
= DV
EE
= -5.2V, V
REF
= 1.000V, T
MIN
to T
MAX
= 0°C to +70°C, unless otherwise noted.) (Note 2.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1:
Typical thermal resistance, junction-to-case R
θ
J C
= 28°C/W. See Package Information.
Continuous Power Dissipation (T
A
= +70°C)
(without additional heatsink) ..............................................1.3W
Operating Temperature Range...............................0°C to +70°C
J unction Temperature Range (Note 1) .................0°C to +150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
V
REF
= 1.000V, current out, into
virtual ground, end-point linearity
Major carry, T
A
= +25°C
±0.1% FSR
10% to 90%, T
A
= +25°C
90% to 10%, T
A
= +25°C
V
REF
= 1.000V, voltage out, VOUT/VIN (Note 3)
±0.024% FSR, 1LSB change
D0–D11 = logic 1, V
REF
= 1.000V,
measured at VOUT
CONDITIONS
ns
15
Settling Time
4
% Full
Scale
-0.05
-0.012
±0.01
±0.006
0.05
0.012
DLE2
ILE1
Differential Linearity Error
-0.012
±0.003
0.012
DLE1
pVs
5.6
Glitch Energy
ps
450
t
RISE
Rise Time
ps
510
t
FALL
Fall Time
% Full
Scale
-1.0
±0.2
1.0
EG
Absolute Gain Error
Guaranteed
12-Bit Monotonicity
μA
40
100
I
OS
Output Offset Current
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
VOUT
VOUT
VOUT
V
REF
= 1.000V, current out, into
virtual ground, end-point linearity
VOUT
% Full
Scale
-0.05
±0.01
0.05
ILE2
Integral Linearity Error
D0–D11 = logic 0, V
REF
= 0V,
measured at VOUT
μA
3
50
I
LEAK
Output Leakage Current
f
OUT
= 5MHz, f
CLK
= 50MHz
f
OUT
= 10MHz, f
CLK
= 50MHz
70
70
f
OUT
= 20MHz, f
CLK
= 100MHz
f
OUT
= 30MHz, f
CLK
= 100MHz
65
60
f
OUT
= 30MHz, f
CLK
= 200MHz
f
OUT
= 40MHz, f
CLK
= 200MHz
f
OUT
= 40MHz, f
CLK
= 250MHz
f
OUT
= 50MHz, f
CLK
= 250MHz
56
53
52
51
dBc
f
OUT
= 40MHz, f
CLK
= 300MHz
f
OUT
= 50MHz, f
CLK
= 300MHz
52
51
Spurious-Free Dynamic Range
nV
√
Hz
Bits 0–11 high, T
A
= +25°C
10.6
Output Noise
DC ACCURACY
TIME-DOMAIN PERFORMANCE (Note 4)
DYNAMIC PERFORMANCE (Notes 4, 5)
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