參數(shù)資料
型號： MAX5548ETE
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： DAC
英文描述： Dual, 8-Bit, Programmable, 30mA High-Output-Current DAC
中文描述： SERIAL INPUT LOADING, 30 us SETTLING TIME, 8-BIT DAC, QCC16
封裝： 3 X 3 MM, 0.80 MM HEIGHT, EXPOSED PAD, MO-220WEED-2, QFN-16
文件頁數(shù)： 4/15頁
文件大?。?/td> 296K
代理商： MAX5548ETE
M
Dual, 8-Bit, Programmable, 30mA
High-Output-Current DAC
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +2.7V to +5.25V, GND = 0, V
REFIN
= +1.25V, internal reference, R
FSADJ_
= 20k
; compliance voltage = (V
DD
- 0.6V),
V
SCLK/SCL
= 0, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
DD
= +3.0V and T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
t
SU:STO
CONDITIONS
MIN
160
TYP
MAX
UNITS
ns
Setup Time for STOP Condition
Maximum Capacitive Load for
Each Bus Line
C
B
400
pF
SPI TIMING CHARACTERISTICS (Figure 6)
SCLK Clock Period
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS
Fall to SCLK Rise Setup Time
SCLK Rise to
CS
Rise Hold Time
DIN Setup Time
DIN Hold Time
SCLK Fall to DOUT Transition
CS
Fall to DOUT Enable
CS
Rise to DOUT Disable
SCLK Rise to
CS
Fall Delay
CS
Rise to SCLK Rise Hold Time
CS
Pulse-Width High
SPI TIMING CHARACTERISTICS FOR DAISY CHAINING (Figure 6)
SCLK Clock Period
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS
Fall to SCLK Rise Setup Time
SCLK Rise to
CS
Rise Hold Time
DIN Setup Time
DIN Hold Time
SCLK Fall to DOUT Transition
CS
Fall to DOUT Enable
CS
Rise to DOUT Disable
SCLK Rise to
CS
Fall Delay
CS
Rise to SCLK Rise Hold Time
CS
Pulse-Width High
t
CP
t
CH
t
CL
t
CSS
t
CSH
t
DS
t
DH
t
DO1
t
CSE
t
CSD
t
CS0
t
CS1
t
CSW
100
40
40
25
50
40
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
C
LOAD
= 30pF
C
LOAD
= 30pF
C
LOAD
= 30pF
40
40
40
50
40
100
t
CP
t
CH
t
CL
t
CSS
t
CSH
t
DS
t
DH
t
DO1
t
CSE
t
CSD
t
CS0
t
CS1
t
CSW
200
80
80
25
50
40
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
C
LOAD
= 30pF
C
LOAD
= 30pF
C
LOAD
= 30pF
40
40
40
50
40
100
Note 1:
100% production tested at T
A
= +25°C. Limits over temperature are guaranteed by design.
Note 2:
INL linearity is guaranteed from code 15 to code 255.
Note 3:
Connect a resistor from FSADJ_ to GND to adjust the full-scale current. See the
Reference Architecture and Operation
section.
Note 4:
Settling time is measured from (0.25 x full scale) to (0.75 x full scale).
Note 5:
The device draws higher supply current when the digital inputs are driven with voltages between (V
DD
- 0.5V) and (GND +
0.5V). See the Supply Current vs. Digital Input Voltage graph in the
Typical Operating Characteristics
.
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MAX5548ETE#G16 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
MAX5548ETE#TG16 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
MAX5548ETE+ 功能描述:數(shù)模轉(zhuǎn)換器- DAC 8-Bit 2Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
MAX5548ETE+T 功能描述:數(shù)模轉(zhuǎn)換器- DAC 8-Bit 2Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
MAX5548ETE-G16 制造商:Maxim Integrated Products 功能描述:DUAL, 8-BIT, 30MA HIGH-OUTPUT-CURRENT DAC - Rail/Tube
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