參數(shù)資料
型號: MAX5233EEE+
廠商: Maxim Integrated Products
文件頁數(shù): 8/18頁
文件大?。?/td> 0K
描述: IC DAC 10BIT DUAL 5V SER 16-QSOP
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 100
設置時間: 10µs
位數(shù): 10
數(shù)據(jù)接口: 串行
轉換器數(shù)目: 2
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應商設備封裝: 16-QSOP
包裝: 管件
輸出數(shù)目和類型: 2 電壓,單極
采樣率(每秒): *
MAX5232/MAX5233
Power-Supply and Bypassing
Considerations
On power-up, the input and DAC registers are cleared
to either zero (RSTV = DGND) or midscale (RSTV =
VDD). Bypass VDD with a 4.7F capacitor in parallel
with a 0.1F capacitor to AGND, and bypass VDD with
a 0.1F capacitor to DGND. Minimize lead lengths to
reduce lead inductance.
Grounding and Layout Considerations
Digital and AC transient signals on AGND or DGND can
create noise at the output. Connect AGND and DGND
to the highest quality ground available. Use proper
grounding techniques, such as a multilayer board with a
low-inductance ground plane or star connect all ground
return paths back to the MAX5232/MAX5233 AGND.
Carefully lay out the traces between channels to reduce
AC cross-coupling and crosstalk. Wire-wrapped boards
and sockets are not recommended. If noise becomes
an issue, shielding may be required.
Chip Information
TRANSISTOR COUNT: 4745
PROCESS: BiCMOS
3V/5V, 10-Bit, Serial Voltage-Output Dual DACs
with Internal Reference
16
______________________________________________________________________________________
TO OTHER
SERIAL DEVICES
MAX5232
MAX5233
DIN
SCLK
CS
MAX5232
MAX5233
DIN
SCLK
CS
MAX5232
MAX5233
DIN
SCLK
CS
DIN
SCLK
CS1
CS2
CS3
Figure 9. Multiple MAX5232/MAX5233s Sharing a Common DIN Line
TO OTHER
SERIAL DEVICES
MAX5232
MAX5233
DIN
SCLK
CS
MAX5232
MAX5233
MAX5232
MAX5233
DIN
DOUT
SCLK
CS
DIN
SCLK
CS
SCLK
DIN
Figure 10. Daisy-Chaining MAX5232/MAX5233 Devices
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