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參數(shù)資料
| 型號(hào)： | MAX3885ECB+TD |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 1:16 DESERIALIZER 64-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 功能： | 解串器 |
| 數(shù)據(jù)速率： | 2.5Gbps |
| 輸入類型： | PECL |
| 輸出類型： | LVDS |
| 輸入數(shù)： | 1 |
| 輸出數(shù)： | 16 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應(yīng)商設(shè)備封裝： | 64-LQFP（10x10） |
| 包裝： | 帶卷 (TR) |
MAX3885
DC termination between the inverting and noninverting
outputs for proper operation. Do not terminate these
outputs to ground. The synchronization LVDS inputs
(SYNC+, SYNC-) are internally terminated with 100
Ω
differential input resistance and, therefore, do not
require external termination.
PECL Inputs
Because of the self-biasing resistor networks, the serial
data and clock PECL inputs (SD+, SD-, SCLK+, SCLK-)
require 53
Ω termination to VCC - 2V when interfacing
with a PECL source (see
Alternative PECL Input
Termination). This results in an equivalent input resis-
tance of 50
Ω.
Applications Information
Alternative PECL Input Termination
Figure 5 shows alternative PECL input-termination
methods. Use Thevenin-equivalent termination when a
VCC - 2V termination voltage is not available. When
interfacing with an ECL-output device, the MAX3885’s
internal self-biasing allows easy ECL AC-coupling ter-
mination.
Layout Techniques
For best performance, use good high-frequency layout
techniques. Filter voltage supplies and keep ground
connections short. Use multiple vias where possible.
Also, use controlled impedance transmission lines to
interface with the MAX3885 high-speed inputs and out-
puts.
+3.3V, 2.488Gbps, SDH/SONET
1:16 Deserializer with LVDS Outputs
6
_______________________________________________________________________________________
MAX3885
PECL
INPUTS
ZO = 50
Ω
ZO = 50
Ω
133
Ω
86.6
Ω
133
Ω
86.6
Ω
+3.3V
MAX3885
PECL
INPUTS
ZO = 50
Ω
53
Ω
ZO = 50
Ω
-2V
53
Ω
-2V
THEVENIN-EQUIVALENT TERMINATION
ECL AC-COUPLING TERMINATION
Figure 5. Alternative PECL Input Termination
SCLK
SD
PCLK
PD0–PD15
NOTE: SIGNALS SHOWN ARE DIFFERENTIAL. FOR EXAMPLE, SCLK = (SCLK+) - (SCLK-).
tSCLK = 1 / fSCLK
tSU
tCLK-Q
tH
Figure 4. Timing Parameters
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參數(shù)描述 |
|---|---|
| MAX3885EVKIT | 功能描述:串行器/解串器 - Serdes Evaluation Kit for the MAX3885 RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX3886ETN+ | 功能描述:串行器/解串器 - Serdes CDR w/Integrated Serial/Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX3886ETN+T | 功能描述:串行器/解串器 - Serdes CDR w/Integrated Serial/Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX388C/D | 功能描述:多路器開關(guān) IC RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 傳播延遲時(shí)間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16 |
| MAX388CJN | 功能描述:多路器開關(guān) IC RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 傳播延遲時(shí)間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16 |
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