參數(shù)資料
型號: MAX3664ESA+T
廠商: Maxim Integrated Products
文件頁數(shù): 10/12頁
文件大?。?/td> 0K
描述: IC PREAMP 622MBPS ULP 3.3V 8SOIC
標準包裝: 2,500
類型: 轉(zhuǎn)阻前置放大器
應用: 光纖學網(wǎng)絡
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SOIC
包裝: 帶卷 (TR)
The cutoff frequency also affects the data-dependent
jitter (DDJ). DDJ due to low-frequency cutoff can be
approximated as droop / slope, where the slope in
V/sec is measured at the 50% crossing of an eye dia-
gram, and droop is the loss-of-signal to noise calculat-
ed above as 1 - e-(2πfct). The slope at the 50% crossing
is typically two times the 10% to 90% slope, which is
approximately 0.35 / bandwidth. For a 622Mbps receiv-
er with a 470MHz bandwidth, the 10% to 90% rise time
is approximately 750ps. The slope through the 50%
crossing will be approximately:
Amplitude (2)(0.8) / 750ps =
1.6 Amplitude / 750ps = 2E9 Amplitude V/sec
DDJ = 2 [Amplitude (1 - e-(2πfct))] /
[ 2.0E9 Amplitude ] = (1 - e-(2πfct)) / (1E9)
OR
fc = -ln[1 - (1.0E9)(DDJ)] / [2
πt]
If the maximum allowable DDJ is 100ps, and t = 112ns
for a 72-bit sequence, then the maximum low-frequency
cutoff is 150kHz.
Several circuits in the receiver can determine the low-
frequency cutoff. In a receiver using the MAX3664 and
MAX3675, there are three locations for concern:
1) The MAX3664’s DC cancellation circuit.
2) The coupling capacitors between the MAX3664
outputs and MAX3675 inputs.
3) The MAX3675’s offset correction circuit.
The highest cutoff frequency in the system determines
the amount of data-dependent jitter created.
The time constants of the MAX3675’s offset correction
and of the coupling capacitors should be separated by
a factor of ten (one decade) to prevent low-frequency
oscillations.
For example, select the offset correction of the MAX3664
to set the receiver cutoff frequency. Note that the
MAX3664’s low-frequency cutoff increases with average
input current. Since DDJ increases with fc, it follows that
DDJ increases as average input increases. When the
input signal is large enough to limit the outputs, however,
DDJ does not increase. Therefore, the maximum DDJ
results from the lowest input that causes the MAX3664
to have limited outputs (see
Typical Operating
Characteristics), which is about 150Ap-p. When select-
ing a capacitor for the COMP pin that achieves your
desired DDJ, use the data from
Typical Operating
Characteristics at IINPUT = 150A.
In summary, use the following method to select the low-
frequency cutoff that will provide the sensitivity and
DDJ required for SDH/SONET receivers:
1) Determine the longest time without transitions.
2) Determine the acceptable loss of SNR ratio, and
the acceptable DDJ due to the transitionless time.
3) Estimate the low-frequency cutoff required for
either the worst-case SNR loss or for DDJ.
4) Select the location in the receiver to determine the
highest cutoff frequency. Normally, the MAX3664
would determine the dominant low-frequency cutoff.
Then select all other low-frequency cutoffs one
decade lower.
5) Select a capacitor for the COMP pin from the
Typical Operating Characteristics graphs. 400pF is
adequate for most 622Mbps SDH/SONET applica-
tions.
MAX3664
622Mbps, Ultra-Low-Power, 3.3V
Transimpedance Preamplifier for SDH/SONET
_______________________________________________________________________________________
7
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