參數(shù)資料
型號: MAX3302EEWA+T
廠商: Maxim Integrated Products
文件頁數(shù): 16/38頁
文件大小: 0K
描述: IC USB OTG TXRX/CHRG PUMP 25-WLP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
類型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: USB 2.0
電源電壓: 3 V ~ 4.5 V
安裝類型: 表面貼裝
封裝/外殼: 25-WFBGA,WLCSP
供應(yīng)商設(shè)備封裝: 25-WLP
包裝: 帶卷 (TR)
MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
______________________________________________________________________________________
23
BIT NUMBER
SYMBOL
OPERATION
VALUE AT
POWER-UP
0
speed
Set to 0 for low-speed (1.5Mbps) mode. Set to 1 for full-speed (12Mbps) mode. This
bit changes the data rate only if spd_susp_ctl = 1 in special-function register 1.
0
1
suspend
Set to 0 for normal operating mode. Set to 1 for suspend mode. This bit changes
the operating mode only if spd_susp_ctl = 1 in special-function register 1.
0
2
dat_se0
Set to 0 for VP_VM USB mode. Set to 1 for DAT_SE0 USB mode.
0
3
Not used.
0
4
bdis_acon_en
Enables the transceiver (when configured as an A device) to connect its pullup
resistor if the B device disconnect is detected during HNP. Set to 0 to disable this
feature. Set to 1 to enable this feature.
0
5
oe_int_en
Set to 0 to disable the interrupt output circuitry of
OE/INT. Set to 1 to enable the
interrupt output circuitry of
OE/INT.
0
6
uart_en
Set to 0 to disable UART mode. Set to 1 to enable UART mode. This bit overrides
the settings of dminus_dir, dplus_dir, and gp_en bits.
0
7
Not used.
0
Table 7. Control Register 1 Description (Write to Address 04h to Set, Write to Address
05h to Clear)
BIT NUMBER
SYMBOL
OPERATION
VALUE AT
POWER-UP
0
dp_pullup
Set to 0 to disconnect the pullup resistor to D+. Set to 1 to connect the pullup resistor to D+.
0
1
dm_pullup
Set to 0 to disconnect the pullup resistor to D-. Set to 1 to connect the pullup resistor to D-.0
2
dp_pulldown
Set to 0 to disconnect the pulldown resistor to D+. Set to 1 to connect the pulldown
resistor to D+.
1
3
dm_pulldown
Set to 0 to disconnect the pulldown resistor to D-. Set to 1 to connect the pulldown
resistor to D-.
1
4
id_pulldown
Set to 0 to allow ID_IN to float. Set to 1 to connect ID_IN to GND.
0
5
vbus_drv
Set to 0 to turn VBUS off. Set to 1 to drive VBUS through a low impedance (see Note 8).0
6
vbus_dischrg
Set to 0 to disconnect the VBUS discharge resistor. Set to 1 to connect the VBUS
discharge resistor (see Note 8).
0
7
vbus_chrg
Set to 0 to disconnect the VBUS charge resistor. Set to 1 to connect the VBUS
charge resistor (see Note 8).
0
Table 8. Control Register 2 Description (Write to Address 06h to Set, Write to Address
07h to Clear)
Note 8: To prevent a high-current state where the transceiver is both sourcing current to VBUS and sinking current from VBUS, the fol-
lowing logic is used to set bits 5, 6, and 7 of control register 2:
Setting vbus_drv clears vbus_dischrg and vbus_chrg
Setting vbus_dischrg clears vbus_drv and vbus_chrg, unless vbus_drv is set with the same command, in which case vbus_drv
clears the other bits
Setting vbus_chrg clears vbus_drv and vbus_dischrg, unless either of these bits are set with the same command, as shown in Table 9
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