參數(shù)資料
型號： MAX3302EEWA+T
廠商： Maxim Integrated Products
文件頁數(shù)： 13/38頁
文件大小： 0K
描述： IC USB OTG TXRX/CHRG PUMP 25-WLP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
類型： 收發(fā)器
驅(qū)動器/接收器數(shù)： 1/1
規(guī)程： USB 2.0
電源電壓： 3 V ~ 4.5 V
安裝類型： 表面貼裝
封裝/外殼： 25-WFBGA，WLCSP
供應(yīng)商設(shè)備封裝： 25-WLP
包裝： 帶卷 (TR)
MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
20
______________________________________________________________________________________
of the MAX3301E/MAX3302E’s slave address, followed
by a 1 (R/
W bit). The master then reads one or more
bytes of data. Figure 19 shows the typical read byte
format.
Burst-Mode Write Byte Format
The MAX3301E/MAX3302E allow a master device to
write to sequential registers without repeatedly sending
the slave address and register address each time. The
master first sends the slave address, followed by a 0 to
write data to the MAX3301E/MAX3302E. The
MAX3301E/MAX3302E send an acknowledge bit back
to the master. The master sends the 8-bit register
address and the MAX3301E/MAX3302E return an
acknowledge bit. The master writes a data byte to the
selected register and receives an acknowledge bit if a
supported register address has been chosen. The reg-
ister address increments and is ready for the master to
send the next data byte. The MAX3301E/MAX3302E
send an acknowledge bit after each data byte. If an
unsupported register is selected, the MAX3301E/
MAX3302E send a NACK to the master and the register
index does not increment (see Figure 20).
S
SLAVE ADDRESS
(7 BITS)
A6
A5
A4
A3
A2
A1
A0
0
A
REGISTER ADDRESS (K)
(8 BITS)
MSB
LSB
AA
MSB
LSB
DATA (K)
(8 BITS)
DATA (K+1)
(8 BITS)
A
DATA (K+2)
(8 BITS)
MSB
LSB
AA
MSB
LSB
DATA (K+N)
(8 BITS)
MSB
LSB
P
S
SLAVE ADDRESS
(7 BITS)
A6
A5
A4
A3
A2
A1
A0
0
A
UNSUPPORTED REGISTER ADDRESS (K)
(8 BITS)
MSB
LSB
ANA
MSB
LSB
DATA (K)
(8 BITS)
MAX3301E/MAX3302E RECOGNIZES
ITS ADDRESS
MAX3301E/MAX3302E SENDS
AN ACK
MAX3301E/MAX3302E RECOGNIZES A WRITE TO AN
UNSUPPORTED LOCATION, THEN SENDS A NACK
R/W
Figure 20. Burst-Mode Write Byte Format
S
SLAVE ADDRESS
(7 BITS)
A6
A5
A4
A3
A2
A1
A0
0
A
REGISTER ADDRESS
(8 BITS)
MSB
LSB
A
RS
SLAVE ADDRESS
(7 BITS)
A6
A5
A4
A3
A2
A1
A0
1
0
A
DATA
(8 BITS)
MSB
LSB
NA
P
R/W
Figure 19. Read Byte Format
R/
W: Read/write (R/W = 1: read; R/W = 0: write)
S: Start condition
RS: Repeated start condition
P: Stop condition
A: Acknowledge bit from the slave
NA: Not-acknowledged bit from the master
Blank: Master transmission
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