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MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
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25
BIT NUMBER
SYMBOL
CONTENTS
VALUE AT
POWER-UP
0
vbus_vld
vbus_vld asserts if a transition occurs on this condition and the appropriate
interrupt-high or interrupt-low enable bit is set. See Tables 10, 12, and 13.
0
1
sess_vld
sess_vld asserts if a transition occurs on this condition and the appropriate
interrupt-high or interrupt-low enable bit is set. See Tables 10, 12, and 13.
0
2
dp_hi
dp_hi asserts if a transition occurs on this condition and the appropriate interrupt-
high or interrupt-low enable bit is set. See Tables 10, 12, and 13.
0
3
id_gnd
id_gnd asserts if a transition occurs on this condition and the appropriate interrupt-
high or interrupt-low enable bit is set. See Tables 10, 12, and 13.
0
4
dm_hi
dm_hi asserts if a transition occurs on this condition and the appropriate interrupt-
high or interrupt-low enable bit is set. See Tables 10, 12, and 13.
0
5
id_float
id_float asserts if a transition occurs on this condition and the appropriate interrupt-
high or interrupt-low enable bit is set. See Tables 10, 12, and 13.
0
6
bdis_acon
bdis_acon asserts if a transition occurs on this condition and the appropriate
interrupt-high or interrupt-low enable bit is set. See Tables 10, 12, and 13.
0
7
cr_int_sess_end
cr_int_sess_end asserts if a transition occurs on this condition and the appropriate
interrupt-high or interrupt-low enable bit is set. See Tables 10, 12, and 13.
0
Table 11. Interrupt Latch Register Description (Write to Address 0Ah to Set, Write to
Address 0Bh to Clear)
BIT NUMBER
SYMBOL
CONTENTS
VALUE AT
POWER-UP
0
vbus_vld
Set to 0 to disable the vbus_vld interrupt for a high-to-low transition. Set to 1 to
enable the vbus_vld interrupt for a high-to-low transition. See Tables 10 and 11.
0
1
sess_vld
Set to 0 to disable the sess_vld interrupt for a high-to-low transition. Set to 1 to
enable the sess_vld interrupt for a high-to-low transition. See Tables 10 and 11.
0
2
dp_hi
Set to 0 to disable the dp_hi interrupt for a high-to-low transition. Set to 1 to
enable the dp_hi interrupt for a high-to-low transition. See Tables 10 and 11.
0
3
id_gnd
Set to 0 to disable the id_gnd interrupt for a high-to-low transition. Set to 1 to
enable the id_gnd interrupt for a high-to-low transition. See Tables 10 and 11.
0
4
dm_hi
Set to 0 to disable the dm_hi interrupt for a high-to-low transition. Set to 1 to
enable the dm_hi interrupt for a high-to-low transition. See Tables 10 and 11.
0
5
id_float
Set to 0 to disable the id_float interrupt for a high-to-low transition. Set to 1 to
enable the id_float interrupt for a high-to-low transition. See Tables 10 and 11.
0
6
bdis_acon
Set to 0 to disable the bdis_acon interrupt for a high-to-low transition. Set to 1 to
enable the bdis_acon interrupt for a high-to-low transition. See Tables 10 and 11.
0
7
cr_int_sess_end
Set to 0 to disable the cr_int_sess_end interrupt for a high-to-low transition.
Set to 1 to enable the cr_int_sess_end interrupt for a high-to-low transition.
See Tables 10 and 11.
0
Table 12. Interrupt-Enable Low Register (Write to Address 0Ch to Set, Write to Address
0Dh to Clear)