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參數(shù)資料
| 型號： | MAX3140CEI+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 10/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART SPI MICRWR W/TXRX 28QSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 特點： | 收發(fā)器 |
| FIFO's： | 8 字節(jié) |
| 規(guī)程： | RS232，RS485 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-QSOP |
| 供應(yīng)商設(shè)備封裝： | 28-QSOP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1404 (CN2011-ZH PDF) |
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MAX3140
SPI/MICROWIRE-Compatible UART with Integrated
True Fail-Safe RS-485/RS-422 Transceivers
18
______________________________________________________________________________________
Table 1. Bit Descriptions (continued)
POR
STATE
DESCRIPTION
BIT
TYPE
BIT
NAME
0
SHDNi
write
Software-Shutdown Bit. Enter software shutdown with a WRITE CONFIGURATION where
SHDNi = 1. Software shutdown takes effect after CS goes high, and causes the oscillator to
stop as soon as the transmitter becomes idle. Software shutdown also clears R, T, RA/FE,
D0r–D7r, D0t–D7t, Pr, Pt, and all data in the receive FIFO. RTS and CTS can be read and
updated while in shutdown. Exit software shutdown with a WRITE CONFIGURATION where
SHDNi = 0. The oscillator restarts typically within 50ms of CS going high. RTS and CTS are
unaffected. Refer to the
Pin Description for hardware shutdown (SHDN input).
0
SHDNo
read
Shutdown Read-Back Bit. The READ CONFIGURATION register outputs SHDNo = 1 when the
UART is in shutdown. Note that this bit is not sent until the current byte in the transmitter is
sent (T = 1). This tells the processor when it may shut down the RS-485/RS-422 driver. This bit
is also set immediately when the device is shut down through the SHDN pin.
0
RA/FE
read
Receiver-Activity/Framing-Error Bit. In shutdown mode, this is the RA bit. In normal operation,
this is the FE bit. In shutdown mode, a transition on RX sets RA = 1. In normal mode, a fram-
ing error sets FE = 1. A framing error occurs if a zero is received when the first stop bit is
expected. FE is set when a framing error occurs, and cleared upon receipt of the next proper-
ly framed character independent of the FIFO being enabled. When the device wakes up, it is
likely that a framing error will occur. This error is cleared with a WRITE CONFIGURATION. The
FE bit is not cleared on a READ DATA operation. When an FE is encountered, the UART
resets itself to the state where it is looking for a start bit.
0
ST
write
Transmit-Stop Bit. One stop bit will be transmitted when ST = 0. Two stop bits will be transmit-
ted when ST = 1. The receiver only requires one stop bit.
0
ST
read
Reads the value of the ST bit.
0
TM
write
Mask for T Bit. IRQ is asserted if TM = 1 and T = 1 (Table 7).
0
TM
read
Reads the value of the TM bit (Table 7).
1
T
read
Transmit-Buffer-Empty Flag. T = 1 means that the transmit buffer is empty and ready to
accept another data word.
0
TE
write
Transmit-Enable Bit. If TE = 1, then only the RTS pin is updated on CS’s rising edge. The con-
tents of RTS, Pt, and D0t–D7t transmit on CS’s rising edge when TE = 0.
Notice to High-Level Programmers
The MAX3140 follows the SPI convention of providing a
bidirectional data path for writes and reads. Whenever
the data is written, data is also read back. This speeds
operation over the SPI bus, as required, when operat-
ing at high baud rates. In most high-level languages,
like C, there are commands for writing and reading
stream I/O devices like the console or serial port. In C
specifically, there is a “PUTCHAR” command that
transmits a character and a “GETCHAR” command that
receives a character. Implementing direct write and
read commands in C with no underlying driver code
causes an intended PUTCHAR command to become a
PUTGETCHAR command. These C commands assume
that they’ll receive some form of BIOS-level support.
The proper way to implement these commands is to
use driver code—usually in the form of an assembly
language interrupt service routine and a callable rou-
tine used by high-level routines. This driver handles the
interrupts and manages the receive and transmit
buffers for the MAX3140. When a PUTCHAR executes,
this driver is called and it safely buffers any characters
received when the current character is transmitted.
Likewise, when a GETCHAR executes, it checks its own
receive buffer before getting data from the MAX3140.
See the C-language outline of a MAX3140 software dri-
ver in Listing 1.
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| MAX3140CEI+ | 功能描述:UART 接口集成電路 SPI/uWire Compatible RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| MAX3140CEI+T | 功能描述:UART 接口集成電路 SPI/uWire Compatible RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| MAX3140CEI-T | 功能描述:UART 接口集成電路 RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| MAX3140EEI | 功能描述:UART 接口集成電路 RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| MAX3140EEI+ | 功能描述:UART 接口集成電路 SPI/uWire Compatible RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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