參數(shù)資料
型號: MAX3140
廠商: Maxim Integrated Products, Inc.
英文描述: SPI/MICROWIRE-Compatible UART with Integrated True Fail-Safe RS-485/RS-422 Transceivers
中文描述: SPI/MICROWIRE兼容的UART,集成真正失效保護的RS-485/RS-422收發(fā)器
文件頁數(shù): 7/36頁
文件大?。?/td> 468K
代理商: MAX3140
M
SPI/MICROWIRE-Compatible UART with Integrated
True Fail-Safe RS-485/RS-422 Transceivers
_______________________________________________________________________________________
7
SWITCHING CHARACTERISTICS—SRL = GND
(V
CC
= +5V ±5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +5V and T
A
= +25°C.)
PARAMETER
SYMBOL
t
DPLH
t
DPHL
MIN
TYP
34
34
MAX
60
60
UNITS
Driver Disable Time from Low
Driver Disable Time from High
t
DLZ
t
DHZ
t
RPLH
,
t
RPHL
100
100
ns
ns
Driver Enable to Output Low
t
DZL
150
ns
Driver Enable to Output High
t
DZH
150
ns
Maximum Data Rate
f
MAX
10
Mbps
Receiver Input to Output
106
150
ns
|
t
RPLH
- t
RPHL
|
Differential
Receiver Skew
Receiver Enable to Output Low
Receiver Enable to Output High
Receiver Disable Time from Low
t
RSKD
0
±10
ns
t
RZL
t
RZH
t
RLZ
20
20
20
50
50
50
ns
ns
ns
Driver Output Skew
|
t
DPLH
- t
DPHL
|
Driver Input to Output
ns
t
DSKEW
-2.5
±10
ns
Driver Rise or Fall Time
t
DR,
t
DF
14
25
ns
Receiver Disable Time from
High
t
RHZ
20
50
ns
Time to Shutdown
t
SHDN
50
200
600
ns
Driver Enable from Shutdown to
Output High
t
DZH(SHDN)
250
ns
Driver Enable from Shutdown to
Output Low
t
DZL(SHDN)
250
ns
Receiver Enable from Shutdown
to Output High
t
RZH(SHDN)
3500
ns
CONDITIONS
Figures 2 and 8, C
L
= 100pF, S2 closed
Figures 2 and 8, C
L
= 100pF, S1 closed
Figures 4 and 6, C
L
= 15pF, S1 closed
Figures 4 and 6, C
L
= 15pF, S2 closed
Figures 7 and 9,
|
V
ID
|
2.0V,
rise and fall time of V
ID
15ns
Figures 7 and 9,
|
V
ID
|
2.0V,
rise and fall time of V
ID
15ns
Figures 2 and 8, C
L
= 100pF, S1 closed
Figures 4 and 6, C
L
= 100pF, S1 closed
Figures 4 and 6, C
L
= 100pF, S2 closed
Figures 2 and 8, C
L
= 100pF, S2 closed
(Note 5)
Figures 4 and 6, C
L
= 15pF, S2 closed
Figures 4 and 6, C
L
= 15pF, S1 closed
Figures 2 and 8, C
L
= 100pF, S2 closed
Figures 3 and 5, R
DIFF
= 54
,
C
L1
= C
L2
= 100pF
Receiver Enable from Shutdown
to Output Low
Figures 3 and 5, R
DIFF
= 54
,
C
L1
= C
L2
= 100pF
t
RZL(SHDN)
3500
Figures 3 and 5, R
DIFF
= 54
,
C
L1
= C
L2
= 100pF
ns
Figures 2 and 8, C
L
= 100pF, S1 closed
Note 1:
All currents into the device are positive; all currents out of the device are negative. All voltages are referred to device
ground unless otherwise noted.
Note 2:
V
OD
and
V
OC
are the changes in V
OD
and V
OC
, respectively, when the Dl input changes state.
Note 3:
The SRL pin is internally biased to V
CC
/2 by a 100k
/100k
resistor-divider. It is guaranteed to be V
CC
/2 if left unconnected.
Note 4:
Maximum current level applies to peak current just prior to foldback-current limiting; minimum current level applies during
current limiting.
Note 5:
The device is put into shutdown by bringing
RE
high and DE low. If the enable inputs are in this state for less than 50ns, the
device is guaranteed not to enter shutdown. If the enable inputs are in this state for at least 600ns, the device is guaranteed
to have entered shutdown.
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