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M
Integrated Powerline Digital Transceiver
______________________________________________________________________________________
21
50MHz AFE CLK
ADC DATA OUTPUT
t
DACI
t
ADCO
t
CLK
= 20ns
t
ADCO
= 2ns
t
DACI
= 3ns
t
CLK
DAC DATA INPUT
Figure 23. AFE ADC and DAC Timing Diagram
AFE Timing
Figure 23 illustrates the relationship of the AFE input
clock and the data into the DAC and out of the ADC.
AFE Serial Interface
The AFE configuration signals GPIO[4], GPIO[5], and
GPIO[6] are used to program the AFE internal registers.
GPIO[4] is the serial clock; GPIO[5] is the bidirectional
data line for register reprogramming and reading, and
when GPIO[6] is asserted HIGH, the registers are in
write mode. Drive these lines low if not used. Refer to
the MAX2980 data sheet for more information on the
AFE serial interface timing.
Upgrading and Programming MAC
There are wide ranges of boot options that provide
good flexibility in running code applications on the
MAX2986 through different chip interfaces. The selec-
tion of different boot modes is possible through boot
pins and flash type pins, which are sensed during the
MAX2986 startup process. There are two boot modes:
1) Downloading encrypted flash-resident code:
The image can be downloaded into flash memory
using either an I
2
C
TM
or SPI interface. The code
image address is stored at the start of flash memory.
The encrypted code image in flash can be updated
using TFTP protocol.
2) Simple code downloaded through UART:
The MAX2986 is configurable to accept code image
from the UART. The first 4 bytes of the image specify
the memory location in SSRAM to which the binary
image
should
be
0x203FFFF). The next 4 bytes specify the length of the
image (excluding 8 header and 4 tail bytes), in terms
of words. The specified length cannot be greater than
128kB (size of SSRAM) and must be nonzero, other-
wise the boot will restart simple code downloaded
through the UART after issuing an appropriate error
message to the host. The last 4 bytes of image are the
checksum. After the image is loaded and checksum is
valid, the image is launched by jumping to the target
(destination) address, otherwise, the boot restarts sim-
ple code downloaded through the UART.
Five pins are used to determine the boot mode. Table 17
shows the corresponding settings (PU: pulled up, PD:
pulled down, X: don’t care). Pullup and pulldown resis-
tors are 10k
. GPIO[8] and GPIO[10] are two pins that
are used for flash operations. These two pins are output
in flash operations but they would be input in the sys-
tem boot process.
If an error occurs during the boot process, the error code
is indicated on the LED pins: GPIO[21] (LED0_ BP0),
GPIO[22] (LED1_ BP1), and GPIO[23] (LED2_BP2)
copied
(0x2020000–
Purchase of I
2
C components from Maxim Integrated Products, Inc., or one of its sublicensed Associated Companies, conveys a
license under the Philips I
2
C Patent Rights to use these components in an I
2
C system, provided that the system conforms to the I
2
C
Standard Specification as defined by Philips.
SPI is a trademark of Motorola, Inc.