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參數(shù)資料
| 型號： | MAX2016ETI-T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements |
| 中文描述： | DUAL LOG OR ANTILOG AMPLIFIER, 22 MHz BAND WIDTH, QCC28 |
| 封裝： | 5 X 5 MM, 0.80 MM HEIGHT, MO-220-WHHD, TQFN-28 |
| 文件頁數(shù)： | 16/19頁 |
| 文件大?。?/td> | 405K |
| 代理商： | MAX2016ETI-T |
M
LF-to-2.5GHz Dual Logarithmic Detector/
Controller for Power, Gain, and VSWR Measurements
16
______________________________________________________________________________________
as possible to reduce losses, radiation, and induc-
tance. For the best performance, route the ground pin
traces directly to the exposed pad under the package.
The PC board exposed pad
MUST
be connected to the
ground plane of the PC board. It is suggested that mul-
tiple vias be used to connect this pad to the lower level
ground planes. This method provides a good RF/ther-
mal conduction path for the device. Solder the exposed
pad on the bottom of the device package to the PC
board. The MAX2016 Evaluation Kit can be used as a
reference for board layout. Gerber files are available
upon request at www.maxim-ic.com.
Power-Supply Bypassing
Proper voltage-supply bypassing is essential for high-
frequency circuit stability. Bypass each V
CC
pin with a
capacitor as close to the pin as possible (
Typical
Application Circuit
).
Exposed Pad RF/Thermal Considerations
The exposed paddle (EP) of the MAX2016’s 28-pin thin
QFN-EP package provides two functions. One is a low
thermal-resistance path to the die; the second is a low-
RF impedance ground connection. The EP
MUST
be
soldered to a ground plane on the PC board, either
directly or through an array of plated via holes (mini-
mum of four holes to provide ground integrity).
MAX2016
RFINA
RFINB
IN
LOGARITHMIC
DETECTOR
LOGARITHMIC
DETECTOR
OUTD
SETD
COUPLER
COUPLER
RF BLOCK
OUT
CSETL
COR
CSETH
20k
Figure 8. Window Comparators Monitoring Mode. COR goes high if OUTD drops below CSETL or rises above CSETH.
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