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參數(shù)資料
| 型號： | MAX2016ETI-T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements |
| 中文描述： | DUAL LOG OR ANTILOG AMPLIFIER, 22 MHz BAND WIDTH, QCC28 |
| 封裝： | 5 X 5 MM, 0.80 MM HEIGHT, MO-220-WHHD, TQFN-28 |
| 文件頁數(shù)： | 10/19頁 |
| 文件大小： | 405K |
| 代理商： | MAX2016ETI-T |
M
LF-to-2.5GHz Dual Logarithmic Detector/
Controller for Power, Gain, and VSWR Measurements
10
______________________________________________________________________________________
Detailed Description
The MAX2016 dual logarithmic amplifier is designed for
a multitude of applications including dual-channel RF
power measurements, AGC control, gain/loss detection,
and VSWR monitoring. This device measures RF signals
ranging from low frequency to 2.5GHz, and operates
from a single 2.7V to 5.25V (using series resistor, R6)
power supply. As with its single-channel counterpart
(MAX2015), the MAX2016 provides unparalleled perfor-
mance with a high 80dB dynamic range at 100MHz and
exceptional accuracy over the extended temperature
and supply voltage ranges.
The MAX2016 uses a pair of logarithmic amplifiers to
detect and compare the power levels of two RF input
signals. The device subtracts one power level from the
other to provide a DC output voltage that is proportional
to the power difference (gain). The MAX2016 can also
measure the return loss/VSWR of an RF signal by moni-
toring the incident and reflected power levels associat-
ed with any given load.
A window detector is easily implemented by using the
on-chip comparators, OR gate, and 2V reference. This
combination of circuitry provides an automatic indica-
tion of when the measured gain is outside a program-
mable range. Alarm monitoring can thus be imple-
mented for detecting high-VSWR states (such as open
or shorted loads).
RF Inputs (RFINA and RFINB)
The MAX2016 has two differential RF inputs. The input
to detector A (RFINA) uses the two input ports RFINA+
and RFINA-, and the input to detector B (RFINB) uses
the two input ports RFINB+ and RFINB-.
Pin Description
PIN
NAME
FUNCTION
1, 28
FA1, FA2
External Capacitor Input. Connecting a capacitor between FA1 and FA2 sets the highpass cutoff
frequency corner for detector A (see the
Input Highpass Filter
section).
2, 9, 12, 20
V
CC
Supply Voltage. Bypass with capacitors as specified in the
Typical Application Circuit
. Place
capacitors as close to each V
CC
as possible (see the
Power-Supply Connections
section).
Differential RF Inputs for Detector A. Requires external DC-blocking capacitors.
Ground. Connect to the printed circuit (PC) board ground plane.
High-Comparator Output
Threshold Input on High Comparator
Comparator OR Logic Output. Output of COUTH ORed with COUTL.
Set-Point Input for Gain Detector
3, 4
5, 17
6
7
8
10
RFINA+, RFINA-
GND
COUTH
CSETH
COR
SETD
11
OUTD
DC Output Voltage Representing P
RFINA
- P
RFINB
. This output provides a DC voltage
proportional to the difference of the input RF powers on RFINA and RFINB.
13, 14
15
16
18, 19
FV2, FV1
CSETL
COUTL
RFINB-, RFINB+
Video-Filter Capacitor Inputs for OUTD
Threshold Set Input on Low Comparator
Low-Comparator Output
Differential RF Inputs for Detector B. Requires external DC-blocking capacitors.
21, 22
FB1, FB2
External Capacitor Input. Connecting a capacitor between FB1 and FB2 sets the highpass cutoff
frequency corner for detector B (see
the
Input Highpass Filter
section).
23
OUTB
Detector B Output. This output provides a voltage proportional to the log of the input power on
differential inputs RFINB+ and RFINB- (RFINB).
24
25
26
SETB
REF
SETA
Set-Point Input for Detector B
2V Reference Output
Set-Point Input for Detector A
27
OUTA
Detector A Output. This output provides a voltage proportional to the log of the input power on
differential inputs RFINA+ and RFINA- (RFINA).
EP
GND
Exposed Paddle. EP must connect to the PC board ground plane.
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