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參數(shù)資料
| 型號： | MAX191BEWG+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 100KSPS 24-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 100k |
| 數(shù)據(jù)接口： | MICROWIRE?，并聯(lián)，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 941mW |
| 電壓電源： | 雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個單端，單極；2 個單端，雙極；1 個差分，單極；1 個差分，雙極 |
MAX191
Low-Power, 12-Bit Sampling ADC
with Internal Reference and Power-Down
______________________________________________________________________________________
15
ing edge of the first clock cycle after conversion end
(when BUSY goes high). As mentioned previously, two
more read operations (after BUSY goes high) are
needed to access the conversion results. The only dif-
ference is that now the low byte can be read first. This
happens by allowing the first read operation to occur
with HBEN low, where the 8 LSBs are accessed. The
second read, with HBEN high, accesses the 4 MSBs
with 4 leading 0s.
Serial-Interface Mode
The serial mode is compatible with Microwire, SPI and
QSPI serial interfaces. In addition, a framing signal
(SSTRB) is provided that allows the devices to interface
with the TMS320 family of DSPs. Set PAR low for serial
mode. A falling edge on CS causes the T/H to sample
the input (Figure 10). Conversion always begins on the
next falling edge of SCLK, regardless of where CS
occurs. The DOUT line remains high-impedance until a
conversion begins. During the MSB decision, DOUT
remains low (leading 0), while SSTRB goes high to indi-
cate that a data frame is beginning. The data is avail-
able at DOUT on the rising edge of SCLK (SCLKOUT
when using an internal clock) and transitions on the
falling edge. DOUT remains low after all data bits have
been shifted out, inserting trailing 0s in the data stream
until CS returns high. The SCLKOUT signal is synchro-
nous with the internal or external clock.
For interface flexibility, DOUT, SCLKOUT and SSTRB
signals enter a high-impedance state when CS is high.
When CS is low, RD controls the status of SCLKOUT and
SSTRB outputs. A logic low RD enables SCLKOUT and
SSTRB, while a logic high forces both outputs into a
high-impedance state. Also, with CS low and HBEN
high, SCLKOUT drives continuously, regardless of con-
version status. This is useful with Ps that require a
continuous serial clock. If CS and HBEN are low,
SCLKOUT is output only during the conversion cycle,
while the converter internal clock runs continuously.
This is useful for creating a simple serial-to-parallel
interface without shift-register overflow (Figure 11).
Maximum Clock Rate in Serial Mode
The maximum SCLK rate depends on the minimum
setup time required at the serial data input to the P
and the ADC’s DOUT to SCLK delay (t22) (see Figure
12). The maximum fSCLK is as follows:
DOUT
SCLK
tSETUP (MIN)
t22
1
fSCLK (MAX) = ––
–––––––––
2
tSU(M) + t22
(
)
tSU(M) IS THE SETUP TIME REQUIRED AT THE SERIAL DATA INPUT TO THE P.
t22 IS THE MAXIMUM SCLK TO DOUT DELAY.
Figure 12. fSCLK(MAX) is limited by the setup time required by
the serial data input to the P.
I/O
CS
SCK
MISO
SS
SCLK
DOUT
+5V
CS
SCK
MISO
CS
SCLK
DOUT
+5V
CS
SCLK
DOUT
CS
SCLK
SSTRB
I/O
SK
SI
I/O
CLKX
CLKR
DR
FSR
MAX191
a. SPI
b. QSPI
c. MICROWIRE
d. TMS320 SERIAL INTERFACE
DOUT
SS
Figure 13. Common Serial-Interface Connections to the MAX191
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX191BEWG-W | 制造商:Maxim Integrated Products 功能描述:PLS. RUSH THIS REQUEST, LARRY SCHMIDT/MAT'LS WAITING FOR - Rail/Tube |
| MAX191BMRG | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX191BMRG/883B | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX191EVKIT-DIP | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 Evaluation System/Evaluation Kit for the MAX191 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX191EVSYS-DIP | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 Low-Power 12-Bit Sampling ADC with Internal Reference and Power-Down RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
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