![](http://datasheet.mmic.net.cn/370000/MAX1813EEI_datasheet_16708447/MAX1813EEI_32.png)
M
Dynamically-Adjustable, Synchronous Step-Down
Controller with Integrated Voltage Positioning
32
______________________________________________________________________________________
If the CPU
’
s VID pins float, the open-circuit pins can
present a problem for the MAX1813
’
s internal mux. The
processor
’
s VID pins can be used for the voltage-mode
setting, together with suitable pullup resistors.
However, the impedance mode VID code is set with
resistors in series with D0
–
D4, and for the impedance
mode to work, any pins intended to be impedance
mode logic low must appear to be low impedance, at
least for the 4μs sampling interval.
Use one of the two following methods to make the D0-
D4 inputs appear low impedance (Figure 14). By using
low-impedance pullup resistors with the CPU
’
s VID
pins, each pin provides the low impedance needed for
the mux to correctly interpret the impedance-mode set-
ting. Unfortunately, the low resistances cause several
mA of additional quiescent current for each of the
CPU
’
s grounded VID pins. Since D0
–
D4 need to briefly
appear low impedance for sampling, the additional qui-
escent current may be avoided by using high-imped-
ance pullups that are bypassed with a large enough
capacitance to make them appear low impedance for
the 4μs sampling interval. As noted in Figure 14, 4.7nF
capacitors allow the inputs to appear low impedance
even though they are pulled up with 1M
resistors.
In some cases, it is desirable to determine the imped-
ance-mode code during system boot so that several
processor types can be used without hardware modifi-
cations. Figure 15 shows one way to implement this
configuration. The desired code is determined by the
system BIOS and programmed into one register of the
MAX1609 using the SMBus
serial interface. The
MAX1609
’
s other register is left in its power-up state (all
outputs high impedance). When
SMBSUS
is low, the
outputs are high impedance and do not affect the
logic-mode VID code setting. When
SMBSUS
is high,
the programmed register is selected, and the MAX1609
forces a low impedance on the appropriate VID input
pins. The ZMODE signal is delayed relative to the
SMB-
SUS
pin because the VID pins that are pulled low
by the MAX1609 take significant time to rise
when they are released. One additional benefit of
using the MAX1609 for this application is that the
application uses only five of the MAX1609
’
s high-volt-
age, open-drain outputs. The other three outputs can
be used for other purposes.
Adjusting V
OUT
with a Resistive-Divider
The output voltage can be adjusted with a resistive-
divider rather than the DAC if desired (Figure 16). The
drawback is that the on-time doesn
’
t automatically
receive correct compensation for changing output volt-
age levels. This can result in variable switching fre-
quency as the resistor ratio is changed, and/or exces-
sive switching frequency. The equation for adjusting
the output voltage is:
where V
FB
is the currently selected DAC value, and
R
INT
is the FB input resistance. In resistor-adjusted cir-
cuits, the DAC code should be set as close as possible
to the actual output voltage to minimize the shift in
switching frequency.
Offsetting the Output Voltage
When required, accurate positive and negative output
voltage adjustments may be made using external resis-
tors to offset the feedback voltage. Place an offset
resistor between the output and FB. The offset voltage
may then be controlled by adjusting the current across
this offset resistor. For a positive voltage offset, connect
a resistor between FB and GND to sink current as
shown in Figure 17.
For a negative offset voltage, place a resistor between
REF and FB to source current as shown in Figure 18.
The reference can only support ±40μA of current, so a
unity-gain buffer must be used to generate the negative
offset reference voltage. Select R
FB
to be between 50
and 500
to avoid output voltage regulation error from
the FB pin
’
s input current.
Adjusting V
OUT
Above 2V
The feed-forward circuit that makes the on-time depen-
dent on the input voltage maintains a nearly constant
switching frequency as the input voltage (I
LOAD
) and
the DAC code are changed. This works extremely well
as long as FB is connected directly to the output. When
the output is adjusted with a resistive-divider, the
switching frequency is increased by the inverse of the
divider ratio.
This change in frequency can be compensated with the
addition of a resistive-divider to the battery-sense input
(V+). Attach a resistor-divider from the battery voltage
V
=
R
R_
(V
V
)
OS(NEG)
FB
OUT(PROG)
REF
V
=
R
R_
V
OS(POS)
FB
OUT(PROG)
V
=V
1+
R4
R5 R
OUT
FB
INT
SMBus is a trademark of Intel Corp.