參數(shù)資料
型號: MAX16032
廠商: Maxim Integrated Products, Inc.
英文描述: EEPROM-Based System Monitors with Nonvolatile Fault Memory
中文描述: 基于EEPROM的系統(tǒng)監(jiān)控器,提供非易失故障存儲
文件頁數(shù): 36/42頁
文件大小: 396K
代理商: MAX16032
M
EEPROM-Based System Monitors
with Nonvolatile Fault Memory
36
______________________________________________________________________________________
Run-Test/Idle:
The run-test/idle state is used between
scan operations or during specific tests. The instruction
register and test data registers remain idle.
Select-DR-Scan:
All test data registers retain their pre-
vious state. With TMS low, a rising edge of TCK moves
the controller into the capture-DR state and initiates a
scan sequence. TMS high during a rising edge on TCK
moves the controller to the select-IR-scan state.
Capture-DR:
Data are parallel-loaded into the test data
registers selected by the current instruction. If the instruc-
tion does not call for a parallel load or the selected test
data register does not allow parallel loads, the test data
register remains at its current value. On the rising edge of
TCK, the controller goes to the shift-DR state if TMS is low
or it goes to the exit1-DR state if TMS is high.
Shift-DR:
The test data register selected by the current
instruction is connected between TDI and TDO and
shifts data one stage toward its serial output on each
rising edge of TCK while TMS is low. On the rising edge
of TCK, the controller goes to the exit1-DR state if TMS
is high.
Exit1-DR:
While in this state, a rising edge on TCK puts
the controller in the update-DR state. A rising edge on
TCK with TMS low puts the controller in the pause-DR
state.
Pause-DR:
Shifting of the test data registers is halted
while in this state. All test data registers retain their pre-
vious state. The controller remains in this state while
TMS is low. A rising edge on TCK with TMS high puts
the controller in the exit2-DR state.
Figure 6. JTAG Block Diagram
INSTRUCTION REGISTER
[LENGTH = 5 BITS]
REGISTERS
AND EEPROM
TEST ACCESS PORT
(TAP) CONTROLLER
MEMORY WRITE REGISTER
[LENGTH = 8 BITS]
MEMORY READ REGISTER
[LENGTH = 8 BITS]
MEMORY ADDRESS REGISTER
[LENGTH = 8 BITS]
BOUNDARY SCAN REGISTER
[LENGTH = 198 BITS]
USER CODE REGISTER
[LENGTH = 32 BITS]
IDENTIFICATION REGISTER
[LENGTH = 32 BITS]
TDI
R
PU
TMS
TCK
V
DBP
MUX 1
01101
01100
11111
BYPASS REGISTER
[LENGTH = 1 BIT]
00000
00100
00001
00010
01000
01001
01010
01100
01101
COMMAND
DECODER
MUX 2
TDO
SAVE
REBOOT
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