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參數(shù)資料
| 型號(hào)： | MAX16032 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | EEPROM-Based System Monitors with Nonvolatile Fault Memory |
| 中文描述： | 基于EEPROM的系統(tǒng)監(jiān)控器，提供非易失故障存儲(chǔ) |
| 文件頁數(shù)： | 35/42頁 |
| 文件大?。?/td> | 396K |
| 代理商： | MAX16032 |
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M
EEPROM-Based System Monitors
with Nonvolatile Fault Memory
______________________________________________________________________________________
35
Table 14. Miscellaneous Settings (continued)
REGISTER
ADDRESS
EEPROM
MEMORY
ADDRESS
BIT
RANGE
DESCRIPTION
[6]
Consecutive Faults on Primary Thresholds:
0 = Fault occurs after primary threshold is exceeded one time (normal operation).
1 = Fault occurs after primary threshold is exceeded twice.
5Ch
DCh
[7]
Fault Log ADC Conversions Option:
0 = When a fault log is triggered, only fault flags are saved in EEPROM.
1 = When a fault log is triggered, fault flags and ADC conversion results (8 MSBs) are
saved in EEPROM.
5Eh
DEh
[7:0]
Firmware Version. 8 bits of memory for user-defined firmware version number.
Configuration Lock:
Write a ‘1’ to r5Fh[0] to toggle this register bit.
0 = Register and EEPROM configuration unlocked.
1 = Register and EEPROM configuration locked.
[0]
[1]
Fault Log EEPROM Lock Flag (set automatically after fault log is triggered):
Write a ‘1’ to r5Fh[1] to toggle this register bit.
0 = EEPROM is not locked. A triggered fault log stores fault information to EEPROM.
1 = A fault log has been triggered. Write a ‘1’ to this bit to clear the flag and allow a
new fault log to be triggered.
5Fh
DFh
[7:2]
Not used.
Special Commands
The MAX16031/MAX16032 provide software reboot and
fault log commands. A software reboot initiates the
boot-up sequence, which normally occurs at POR.
During boot-up, EEPROM configuration data is copied
to registers. To initiate a software reboot, send 0xFC
using the send byte format. A software-initiated fault log
is functionally the same as a hardware-initiated fault
log. During a fault log, ADC registers and fault informa-
tion are logged in EEPROM. To trigger a software initi-
ated fault log, send 0xFD using the send byte format.
JTAG Serial Interface
The MAX16031/MAX16032 contain an IEEE 1149.1- com-
pliant JTAG port in addition to the I
2
C/SMBus-compatible
serial bus. Either interface may be used to access internal
memory; however, only one interface is allowed to run at
a time. All digital I/Os on the MAX16031/MAX16032 are
IEEE 1149.1 boundary-scan compliant, and contain the
typical JTAG boundary scan cells that allow the
inputs/outputs to be polled or forced high/low using stan-
dard JTAG instructions. The MAX16031/MAX16032 con-
tain extra JTAG instructions and registers not included in
the JTAG specification that provide access to internal
memory. The extra instructions are: LOAD ADDRESS,
WRITE, READ, REBOOT, SAVE, and USERCODE. The
extra registers are: memory address, memory write,
memory read, and user-code data. See Figure 6 for a
block diagram of the JTAG interface.
Test Access Port (TAP) Controller State Machine
The TAP controller is a finite state machine that
responds to the logic level at TMS on the rising edge of
TCK. See Figure 7 for a diagram of the finite state
machine.
Test-Logic-Reset:
At power-up, the TAP controller is in
the test-logic-reset state. The instruction register con-
tains the IDCODE instruction. All system logic of the
device operates normally.
Table 15. Setting the I
2
C/SMBus Slave
Address
A1
GND
GND
GND
N.C.
N.C.
N.C.
DBP
DBP
DBP
A0
GND
N.C.
DBP
GND
N.C.
DBP
GND
N.C.
DBP
BUS ADDRESS
0011000
0011001
0011010
0101001
0101010
0101011
1001100
1001111
1001110
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| MAX16032ETM+T | 功能描述:監(jiān)控電路 EEPROM-Based w/NV Fault Memory RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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| MAX16033LLB26+ | 制造商:Maxim Integrated Products 功能描述:VOLT SUPERVISOR MONITOR 2.63V 10PIN UDFN - Rail/Tube |
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