參數(shù)資料
型號: MAX1450EAP
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 模擬信號調(diào)理
英文描述: Low-Cost, 1%-Accurate Signal Conditioner for Piezoresistive Sensors
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO20
封裝: 5.30 X 0.65 MM, SSOP-20
文件頁數(shù): 5/12頁
文件大?。?/td> 98K
代理商: MAX1450EAP
Summing Junction
The second stage in the analog signal path consists of
a summing junction for offset, offset temperature com-
pensation, and the PGA output. The offset voltage
(V
OFFSET
) and offset temperature-compensation volt-
age (V
OFFTC
) add or subtract from the PGA output
depending on their respective sign bits, offset sign
(SOFF), and offset TC sign (SOTC). V
OFFSET
and
V
OFFTC
can range in magnitude from V
SS
to V
DD
.
Output Buffer
The final stage in the analog signal path consists
of a unity-gain buffer. This buffer is capable of swinging
to within 250mV of V
SS
and V
DD
while sourcing/sinking
up to 1.0mA, or within 50mV of the power supplies with
no load.
Bridge Drive
Figure 2 shows the functional diagram of the on-chip
current source. The voltage at FSOTRIM, in conjunction
with R
ISRC
, sets the nominal current, I
ISRC
which sets
the FSO (refer to Figure 3 for sensor terminology.) I
ISRC
is additionally modulated by components from the
external resistor R
STC
and the optional resistor R
LIN
.
R
STC
is used to feed back a portion of the buffered
bridge-excitation voltage (V
BBUF
), which compensates
FSO TC errors by modulating the bridge-excitation cur-
rent over temperature. To correct FSO linearity errors,
feed back a portion of the output voltage to the current-
source reference node via the optional R
LIN
resistor.
Applic ations Information
Compensation Proc edure
The following compensation procedure assumes a pres-
sure transducer with a +5V supply and an output voltage
that is ratiometric to the supply voltage (see Ratiometric
Output Configuration section). The desired offset voltage
(V
OUT
at P
MIN
) is 0.5V, and the desired FSO voltage
(V
OUT
(P
MAX
) - V
OUT
(P
MIN
)) is 4V; thus the FS output volt-
age (V
OUT
at P
MAX
) will be 4.5V. The procedure requires
a minimum of two test pressures (e.g., zero and full scale)
and two temperatures. A typical compensation procedure
is as follows:
1) Perform Coefficient Initialization
2) Perform FSO Calibration
3) Perform FSO TC Compensation
4) Perform OFFSET TC Compensation
5) Perform OFFSET Calibration
6) Perform Linearity Calibration (Optional)
Coeffic ient Initialization
Select the resistor values and the PGA gain to prevent
gross overload of the PGA and bridge current source.
These values depend on sensor behavior and require
some sensor characterization data. This data may be
available from the sensor manufacturer. If not, it can be
generated by performing a two-temperature, two-pres-
M
Low-Cost, 1%-Ac c urate S ignal Conditioner
for Piezoresistive S ensors
_______________________________________________________________________________________
5
V
DD
I
BDRIVE
13 (I
ISRC
)
V
BDRIVE
I
ISRC
I
ISRC
BBUF
INP
INM
SENSOR
R
ISRC
(EXTERNAL)
BDRIVE
FSOTRIM
BBUF
OUT
A = 1
R
(EXTERNAL)
R
LIN
(OPTIONAL)
(EXTERNAL)
MAX1450
Figure 2. Bridge Drive Circuit
相關PDF資料
PDF描述
MAX1452 Low-Cost Precision Sensor Signal Conditioner
MAX1452AAE Low-Cost Precision Sensor Signal Conditioner
MAX1452CAE Low-Cost Precision Sensor Signal Conditioner
MAX1452EAE Low-Cost Precision Sensor Signal Conditioner
MAX1457 0.1%-Accurate Signal Conditioner for Piezoresistive Sensor Compensation
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