- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1936 > MAX1358BETL+W (Maxim Integrated Products)DAS 16BIT DUAL 10:1 40-TQFN PDF資料下載
參數(shù)資料
| 型號(hào)： | MAX1358BETL+W |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 58/71頁(yè) |
| 文件大小： | 0K |
| 描述： | DAS 16BIT DUAL 10:1 40-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS） |
| 分辨率（位）： | 16 b |
| 采樣率（每秒）： | 21.94k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 1.8 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-TQFN-EP（6x6） |
| 包裝： | 托盤 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)當(dāng)前第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)
MAX1358B
16-Bit, Data-Acquisition System with ADC, DACs,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
______________________________________________________________________________________
61
With the SLEEP or
SLEEP function deasserted on
UPIO, clear the SHDN bit by writing to the normal-
mode register address control byte.
With the SLEEP or
SLEEP function deasserted,
assert WU or
WU (wake-up) function on UPIO.
With the SLEEP or
SLEEP function deasserted, the
day alarm triggers.
Wake-Up
A wake-up event, such as an assertion of a UPIO con-
figured as WU or a time-of-day alarm causes the
MAX1358B to exit sleep mode, if in sleep mode. A
wake-up event in normal mode results only in a wake-up
event being recorded in the STATUS register.
RESET
The
RESET output pulls low for any one of the following
cases: power-on reset, DVDD monitor trips and
RSTE = 0, watchdog timer expires, crystal oscillator is
attached, and 32kHz clock not ready.
The
RESET output can be turned off through the RSTE
bit in the PS_VMONS register, causing DVDD low sup-
ply voltage events to issue an interrupt or poll through
the LDVD status bit. This allows brownout detection
Cs that operate with DVDD < 1.8V.
Driving UPIO Outputs to AVDD Levels
UPIO outputs can be driven to AVDD levels in systems
with separate AVDD and DVDD supplies. Disable the
charge-pump doubler by setting CPE = 0 in the
PS_VMONS register, and connect the system’s analog
supply to AVDD and CPOUT. Setting UPIO outputs to
drive to CPOUT results in AVDD-referenced logic levels.
Supply Voltage Measurement
The AVDD supply voltage can be measured with the
ADC by reversing the normal input and reference sig-
nals. The REF voltage is applied to one multiplexer
input, and AGND is selected in the other. The AVDD
signal is then switched in as the ADC reference voltage
and a conversion is performed. The AVDD value can
then be calculated directly as:
VAVDD = (VREF x Gain x 65,536)/N
where VREF is the reference voltage for the ADC, Gain
is the PGA gain before the ADC, and N is the ADC
result. Note the AVDD voltage must be greater than the
gained-up REF voltage (AVDD > VREF x Gain). This
measurement must be done in unipolar mode.
0000 0000 0000 0000
0000 0000 0000 0001
0000 0000 0000 0010
65,535
65,533
INPUT VOLTAGE (LSB)
B
INA
RY
O
U
TP
UT
CO
DE
1111 1111 1111 1101
1111 1111 1111 1110
1111 1111 1111 1111
1 LSB =
VREF
(GAIN x 65,536)
0
2
VREF/GAIN
V
REF
/GAIN
13
1111 1111 1111 1100
0000 0000 0000 0011
FULL-SCALE TRANSITION
Figure 20. ADC Unipolar Transfer Function
MAX1358B
DAC A
OUTA
OUTB
REF
DAC B
FBA
FBB
Figure 22. DAC Unipolar Output Circuit
0+1
-1
1000 0000 0000 0000
1000 0000 0000 0001
1000 0000 0000 0010
+32,767
+32,765
INPUT VOLTAGE (LSB)
B
INA
RY
O
U
TP
UT
CO
DE
0111 1111 1111 1101
0111 1111 1111 1110
0111 1111 1111 1111
0000 0000 0000 0000
0000 0000 0000 0001
1111 1111 1111 1111
1 LSB =
VREF
(GAIN x 65,536)
x 2
-32,768
-32,766
VREF/GAIN
V
REF
/GAIN
V
REF
/GAIN
Figure 21. ADC Bipolar Transfer Function
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX1406EWE | IC TX/RX RS232 230KBPS 16-SOIC |
| MAX1414CAI+T | IC DAS 16BIT LP 28-SSOP |
| MAX1441GUP/V+ | IC PROXMITY SENSOR 2CH 20-TSSOP |
| MAX14502AETL+T | IC CARD READER USB-SD 40-TQFN |
| MAX14505EWC+T | IC SWITCH DUAL SPDT 12WLP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX1358EVKIT+ | 制造商:Maxim Integrated Products 功能描述:EVALUATION KIT FOR THE MAX1358 - Boxed Product (Development Kits) |
| MAX1359ACGL | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube |
| MAX1359ACTL | 制造商:Maxim Integrated Products 功能描述:16-BIT DATA-ACQUISITION SYSTEM W ADC,DACS,UPI - Rail/Tube |
| MAX1359ACTL+ | 制造商:Maxim Integrated Products 功能描述:DATA ACQ SYS SGL ADC SGL DAC 16BIT 40TQFN EP - Rail/Tube |
| MAX1359ACTL+T | 制造商:Maxim Integrated Products 功能描述:DATA ACQ SYS SGL ADC SGL DAC 16BIT 40TQFN EP - Tape and Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。